class SwingSchedulerDAG

Declaration

class SwingSchedulerDAG : public ScheduleDAGInstrs { /* full declaration omitted */ };

Description

This class builds the dependence graph for the instructions in a loop, and attempts to schedule the instructions using the SMS algorithm.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:112

Inherits from: ScheduleDAGInstrs

Member Variables

Inherited from ScheduleDAGInstrs:

protected MLI

protected MFI

protected SchedModel

protected RemoveKillFlags

protected CanHandleTerminators = false

protected TrackLaneMasks = false

protected BB

protected RegionBegin

protected RegionEnd

protected NumRegionInstrs

protected MISUnitMap

protected Defs

protected Uses

protected CurrentVRegDefs

protected CurrentVRegUses

protected AAForDep = nullptr

protected BarrierChain = nullptr

protected UnknownValue

protected Topo

protected DbgValues

protected FirstDbgValue = nullptr

protected LiveRegs

Inherited from ScheduleDAG:

public TM

public TII

public TRI

public MF

public MRI

public SUnits

public EntrySU

public ExitSU

public StressSched

Method Overview

• public SwingSchedulerDAG(llvm::MachinePipeliner & P, llvm::MachineLoop & L, llvm::LiveIntervals & lis, const llvm::RegisterClassInfo & rci, unsigned int II)
• public void addMutation(std::unique_ptr<ScheduleDAGMutation> Mutation)
• public void applyInstrChange(llvm::MachineInstr * MI, llvm::SMSchedule & Schedule)
• public static bool classof(const llvm::ScheduleDAGInstrs * DAG)
• public void finishBlock()
• public void fixupRegisterOverlaps(std::deque<SUnit *> & Instrs)
• public int getALAP(llvm::SUnit * Node)
• public int getASAP(llvm::SUnit * Node)
• public unsigned int getDepth(llvm::SUnit * Node)
• public unsigned int getDistance(llvm::SUnit * U, llvm::SUnit * V, const llvm::SDep & Dep)
• public unsigned int getHeight(llvm::SUnit * Node)
• public unsigned int getInstrBaseReg(llvm::SUnit * SU)
• public int getMOV(llvm::SUnit * Node)
• public int getZeroLatencyDepth(llvm::SUnit * Node)
• public int getZeroLatencyHeight(llvm::SUnit * Node)
• public bool hasNewSchedule()
• public bool isBackedge(llvm::SUnit * Source, const llvm::SDep & Dep)
• public bool isLoopCarriedDep(llvm::SUnit * Source, const llvm::SDep & Dep, bool isSucc = true)
• public void schedule()

Inherited from ScheduleDAGInstrs:

• protected addBarrierChain
• protected addChainDependencies
• protected addChainDependencies
• protected addChainDependencies
• protected addChainDependency
• public addEdge
• protected addPhysRegDataDeps
• protected addPhysRegDeps
• public addSchedBarrierDeps
• protected addVRegDefDeps
• protected addVRegUseDeps
• public begin
• public buildSchedGraph
• public canAddEdge
• protected deadDefHasNoUse
• public doMBBSchedRegionsTopDown
• public dump
• public dumpNode
• public end
• public enterRegion
• public exitRegion
• public finalizeSchedule
• public finishBlock
• public fixupKills
• public getDAGName
• public getGraphNodeLabel
• protected getLaneMaskForMO
• public getSUnit
• public getSchedClass
• public getSchedModel
• protected initSUnits
• protected insertBarrierChain
• public newSUnit
• protected reduceHugeMemNodeMaps
• public schedule
• public startBlock
• protected startBlockForKills
• protected toggleKillFlag

Inherited from ScheduleDAG:

• public VerifyScheduledDAG
• public addCustomGraphFeatures
• public clearDAG
• public dump
• public dumpNode
• protected dumpNodeAll
• public dumpNodeName
• public getDAGName
• public getGraphNodeLabel
• public getInstrDesc
• public viewGraph
• public viewGraph

Methods

¶SwingSchedulerDAG(
    llvm::MachinePipeliner& P,
    llvm::MachineLoop& L,
    llvm::LiveIntervals& lis,
    const llvm::RegisterClassInfo& rci,
    unsigned int II)

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:200

Parameters

llvm::MachinePipeliner& P

llvm::MachineLoop& L

llvm::LiveIntervals& lis

const llvm::RegisterClassInfo& rci

unsigned int II

¶void addMutation(
    std::unique_ptr<ScheduleDAGMutation> Mutation)

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:278

Parameters

std::unique_ptr<ScheduleDAGMutation> Mutation

¶void applyInstrChange(llvm::MachineInstr* MI,
                      llvm::SMSchedule& Schedule)

Description

Apply changes to the instruction if needed. The changes are need to improve the scheduling and depend up on the final schedule.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:264

Parameters

llvm::MachineInstr* MI

llvm::SMSchedule& Schedule

¶static bool classof(
    const llvm::ScheduleDAGInstrs* DAG)

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:282

Parameters

const llvm::ScheduleDAGInstrs* DAG

¶void finishBlock()

Description

Clean up after the software pipeliner runs.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:210

¶void fixupRegisterOverlaps(
    std::deque<SUnit*>& Instrs)

Description

Attempt to fix the degenerate cases when the instruction serialization causes the register lifetimes to overlap. For example, p' = store_pi(p, b) = load p, offset In this case p and p' overlap, which means that two registers are needed. Instead, this function changes the load to use p' and updates the offset.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:266

Parameters

std::deque<SUnit*>& Instrs

¶int getALAP(llvm::SUnit* Node)

Description

Return the latest time an instruction my be scheduled.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:219

Parameters

llvm::SUnit* Node

¶int getASAP(llvm::SUnit* Node)

Description

Return the earliest time an instruction may be scheduled.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:216

Parameters

llvm::SUnit* Node

¶unsigned int getDepth(llvm::SUnit* Node)

Description

The depth, in the dependence graph, for a node.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:226

Parameters

llvm::SUnit* Node

¶unsigned int getDistance(llvm::SUnit* U,
                         llvm::SUnit* V,
                         const llvm::SDep& Dep)

Description

The distance function, which indicates that operation V of iteration I depends on operations U of iteration I-distance.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:256

Parameters

llvm::SUnit* U

llvm::SUnit* V

const llvm::SDep& Dep

¶unsigned int getHeight(llvm::SUnit* Node)

Description

The height, in the dependence graph, for a node.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:235

Parameters

llvm::SUnit* Node

¶unsigned int getInstrBaseReg(llvm::SUnit* SU)

Description

Return the new base register that was stored away for the changed instruction.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:270

Parameters

llvm::SUnit* SU

¶int getMOV(llvm::SUnit* Node)

Description

The mobility function, which the number of slots in which an instruction may be scheduled.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:223

Parameters

llvm::SUnit* Node

¶int getZeroLatencyDepth(llvm::SUnit* Node)

Description

The maximum unweighted length of a path from an arbitrary node to the given node in which each edge has latency 0

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:230

Parameters

llvm::SUnit* Node

¶int getZeroLatencyHeight(llvm::SUnit* Node)

Description

The maximum unweighted length of a path from the given node to an arbitrary node in which each edge has latency 0

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:239

Parameters

llvm::SUnit* Node

¶bool hasNewSchedule()

Description

Return true if the loop kernel has been scheduled.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:213

¶bool isBackedge(llvm::SUnit* Source,
                const llvm::SDep& Dep)

Description

Return true if the dependence is a back-edge in the data dependence graph. Since the DAG doesn't contain cycles, we represent a cycle in the graph using an anti dependence from a Phi to an instruction.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:246

Parameters

llvm::SUnit* Source

const llvm::SDep& Dep

¶bool isLoopCarriedDep(llvm::SUnit* Source,
                      const llvm::SDep& Dep,
                      bool isSucc = true)

Description

Return true for an order or output dependence that is loop carried potentially. A dependence is loop carried if the destination defines a valu that may be used or defined by the source in a subsequent iteration.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:252

Parameters

llvm::SUnit* Source

const llvm::SDep& Dep

bool isSucc = true

¶void schedule()

Description

We override the schedule function in ScheduleDAGInstrs to implement the scheduling part of the Swing Modulo Scheduling algorithm.

Declared at: llvm/include/llvm/CodeGen/MachinePipeliner.h:209