class RegisterClassInfo

Declaration

class RegisterClassInfo { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:30

Method Overview

Methods

RegisterClassInfo()

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:81

unsigned int computePSetLimit(
    unsigned int Idx) const

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:144

Parameters

unsigned int Idx

unsigned int getLastCalleeSavedAlias(
    unsigned int PhysReg) const

Description

getLastCalleeSavedAlias - Returns the last callee saved register that overlaps PhysReg, or 0 if Reg doesn't overlap a CalleeSavedAliases.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:112

Parameters

unsigned int PhysReg

unsigned int getLastCostChange(
    const llvm::TargetRegisterClass* RC)

Description

Get the position of the last cost change in getOrder(RC). All registers in getOrder(RC).slice(getLastCostChange(RC)) will have the same cost according to TRI->getCostPerUse().

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:130

Parameters

const llvm::TargetRegisterClass* RC

unsigned int getMinCost(
    const llvm::TargetRegisterClass* RC)

Description

Get the minimum register cost in RC's allocation order. This is the smallest value returned by TRI->getCostPerUse(Reg) for all the registers in getOrder(RC).

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:122

Parameters

const llvm::TargetRegisterClass* RC

unsigned int getNumAllocatableRegs(
    const llvm::TargetRegisterClass* RC) const

Description

getNumAllocatableRegs - Returns the number of actually allocatable registers in RC in the current function.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:89

Parameters

const llvm::TargetRegisterClass* RC

ArrayRef<llvm::MCPhysReg> getOrder(
    const llvm::TargetRegisterClass* RC) const

Description

getOrder - Returns the preferred allocation order for RC. The order contains no reserved registers, and registers that alias callee saved registers come last.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:96

Parameters

const llvm::TargetRegisterClass* RC

unsigned int getRegPressureSetLimit(
    unsigned int Idx) const

Description

Get the register unit limit for the given pressure set index. RegisterClassInfo adjusts this limit for reserved registers.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:137

Parameters

unsigned int Idx

bool isProperSubClass(
    const llvm::TargetRegisterClass* RC) const

Description

isProperSubClass - Returns true if RC has a legal super-class with more allocatable registers. Register classes like GR32_NOSP are not proper sub-classes because %esp is not allocatable. Similarly, tGPR is not a proper sub-class in Thumb mode because the GPR super-class is not legal.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:106

Parameters

const llvm::TargetRegisterClass* RC

void runOnMachineFunction(
    const llvm::MachineFunction& MF)

Description

runOnFunction - Prepare to answer questions about MF. This must be called before any other methods are used.

Declared at: llvm/include/llvm/CodeGen/RegisterClassInfo.h:85

Parameters

const llvm::MachineFunction& MF