class RegisterBankInfo

Declaration

class RegisterBankInfo { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:39

Member Variables

protected llvm::RegisterBank** RegBanks

Hold the set of supported register banks.

protected unsigned int NumRegBanks

Total number of register banks.

protected int MapOfPartialMappings

protected int MapOfValueMappings

protected int MapOfOperandsMappings

protected int MapOfInstructionMappings

protected int PhysRegMinimalRCs

public static const unsigned int DefaultMappingID

Identifier used when the related instruction mapping instance is generated by target independent code. Make sure not to use that identifier to avoid possible collision.

public static const unsigned int InvalidMappingID

Identifier used when the related instruction mapping instance is generated by the default constructor. Make sure not to use that identifier.

Method Overview

• protected RegisterBankInfo()
• protected RegisterBankInfo(llvm::RegisterBank ** RegBanks, unsigned int NumRegBanks)
• public static void applyDefaultMapping(const llvm::RegisterBankInfo::OperandsMapper & OpdMapper)
• public void applyMapping(const llvm::RegisterBankInfo::OperandsMapper & OpdMapper) const
• public virtual void applyMappingImpl(const llvm::RegisterBankInfo::OperandsMapper & OpdMapper) const
• public bool cannotCopy(const llvm::RegisterBank & Dst, const llvm::RegisterBank & Src, unsigned int Size) const
• public static const llvm::TargetRegisterClass * constrainGenericRegister(llvm::Register Reg, const llvm::TargetRegisterClass & RC, llvm::MachineRegisterInfo & MRI)
• public virtual unsigned int copyCost(const llvm::RegisterBank & A, const llvm::RegisterBank & B, unsigned int Size) const
• public virtual unsigned int getBreakDownCost(const llvm::RegisterBankInfo::ValueMapping & ValMapping, const llvm::RegisterBank * CurBank = nullptr) const
• public virtual llvm::RegisterBankInfo::InstructionMappings getInstrAlternativeMappings(const llvm::MachineInstr & MI) const
• public virtual const llvm::RegisterBankInfo::InstructionMapping & getInstrMapping(const llvm::MachineInstr & MI) const
• protected const llvm::RegisterBankInfo::InstructionMapping & getInstrMappingImpl(const llvm::MachineInstr & MI) const
• public llvm::RegisterBankInfo::InstructionMappings getInstrPossibleMappings(const llvm::MachineInstr & MI) const
• public const llvm::RegisterBankInfo::InstructionMapping & getInstructionMapping(unsigned int ID, unsigned int Cost, const llvm::RegisterBankInfo::ValueMapping * OperandsMapping, unsigned int NumOperands) const
• public const llvm::RegisterBankInfo::InstructionMapping & getInvalidInstructionMapping() const
• protected const llvm::TargetRegisterClass & getMinimalPhysRegClass(llvm::Register Reg, const llvm::TargetRegisterInfo & TRI) const
• public unsigned int getNumRegBanks() const
• protected template <typename Iterator>const llvm::RegisterBankInfo::ValueMapping * getOperandsMapping(Iterator Begin, Iterator End) const
• protected const llvm::RegisterBankInfo::ValueMapping * getOperandsMapping(std::initializer_list<const ValueMapping *> OpdsMapping) const
• protected const llvm::RegisterBankInfo::ValueMapping * getOperandsMapping(const SmallVectorImpl<const llvm::RegisterBankInfo::ValueMapping *> & OpdsMapping) const
• protected const llvm::RegisterBankInfo::PartialMapping & getPartialMapping(unsigned int StartIdx, unsigned int Length, const llvm::RegisterBank & RegBank) const
• public const llvm::RegisterBank * getRegBank(llvm::Register Reg, const llvm::MachineRegisterInfo & MRI, const llvm::TargetRegisterInfo & TRI) const
• public const llvm::RegisterBank & getRegBank(unsigned int ID) const
• protected llvm::RegisterBank & getRegBank(unsigned int ID)
• public const llvm::RegisterBank * getRegBankFromConstraints(const llvm::MachineInstr & MI, unsigned int OpIdx, const llvm::TargetInstrInfo & TII, const llvm::MachineRegisterInfo & MRI) const
• public virtual const llvm::RegisterBank & getRegBankFromRegClass(const llvm::TargetRegisterClass & RC, llvm::LLT Ty) const
• public unsigned int getSizeInBits(llvm::Register Reg, const llvm::MachineRegisterInfo & MRI, const llvm::TargetRegisterInfo & TRI) const
• protected const llvm::RegisterBankInfo::ValueMapping & getValueMapping(const llvm::RegisterBankInfo::PartialMapping * BreakDown, unsigned int NumBreakDowns) const
• protected const llvm::RegisterBankInfo::ValueMapping & getValueMapping(unsigned int StartIdx, unsigned int Length, const llvm::RegisterBank & RegBank) const
• public bool verify(const llvm::TargetRegisterInfo & TRI) const
• public virtual ~RegisterBankInfo()

Methods

¶RegisterBankInfo()

Description

This constructor is meaningless. It just provides a default constructor that can be used at link time when GlobalISel is not built. That way, targets can still inherit from this class without doing crazy gymnastic to avoid link time failures.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:426

¶RegisterBankInfo(llvm::RegisterBank** RegBanks,
                 unsigned int NumRegBanks)

Description

Create a RegisterBankInfo that can accommodate up to \p NumRegBanks RegisterBank instances.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:418

Parameters

llvm::RegisterBank** RegBanks

unsigned int NumRegBanks

¶static void applyDefaultMapping(
    const llvm::RegisterBankInfo::OperandsMapper&
        OpdMapper)

Description

Helper method to apply something that is like the default mapping. Basically, that means that \p OpdMapper.getMI() is left untouched aside from the reassignment of the register operand that have been remapped. The type of all the new registers that have been created by the mapper are properly remapped to the type of the original registers they replace. In other words, the semantic of the instruction does not change, only the register banks. If the mapping of one of the operand spans several registers, this method will abort as this is not like a default mapping anymore.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:564

Parameters

const llvm::RegisterBankInfo::OperandsMapper& OpdMapper

¶void applyMapping(
    const llvm::RegisterBankInfo::OperandsMapper&
        OpdMapper) const

Description

Apply \p OpdMapper.getInstrMapping() to \p OpdMapper.getMI(). After this call \p OpdMapper.getMI() may not be valid anymore.\p OpdMapper.getInstrMapping().getID() carries the information of what has been chosen to map \p OpdMapper.getMI(). This ID is set by the various getInstrXXXMapping method. Therefore, getting the mapping and applying it should be kept in sync.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:714

Parameters

const llvm::RegisterBankInfo::OperandsMapper& OpdMapper

¶virtual void applyMappingImpl(
    const llvm::RegisterBankInfo::OperandsMapper&
        OpdMapper) const

Description

See ::applyMapping.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:567

Parameters

const llvm::RegisterBankInfo::OperandsMapper& OpdMapper

¶bool cannotCopy(const llvm::RegisterBank& Dst,
                const llvm::RegisterBank& Src,
                unsigned int Size) const

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:623

Parameters

const llvm::RegisterBank& Dst

const llvm::RegisterBank& Src

unsigned int Size

Returns

true if emitting a copy from \p Src to \p Dst is impossible.

¶static const llvm::TargetRegisterClass*
constrainGenericRegister(
    llvm::Register Reg,
    const llvm::TargetRegisterClass& RC,
    llvm::MachineRegisterInfo& MRI)

Description

Constrain the (possibly generic) virtual register \p Reg to \p RC.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:645

Parameters

llvm::Register Reg

const llvm::TargetRegisterClass& RC

llvm::MachineRegisterInfo& MRI

Returns

The constrained register class, or nullptr if there is none.

¶virtual unsigned int copyCost(
    const llvm::RegisterBank& A,
    const llvm::RegisterBank& B,
    unsigned int Size) const

Description

Get the cost of a copy from \p B to \p A, or put differently, get the cost of A = COPY B. Since register banks may cover different size, \p Size specifies what will be the size in bits that will be copied around.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:613

Parameters

const llvm::RegisterBank& A

const llvm::RegisterBank& B

unsigned int Size

¶virtual unsigned int getBreakDownCost(
    const llvm::RegisterBankInfo::ValueMapping&
        ValMapping,
    const llvm::RegisterBank* CurBank =
        nullptr) const

Description

Get the cost of using \p ValMapping to decompose a register. This is similar to ::copyCost, except for cases where multiple copy-like operations need to be inserted. If the register is used as a source operand and already has a bank assigned, \p CurBank is non-null.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:632

Parameters

const llvm::RegisterBankInfo::ValueMapping& ValMapping

const llvm::RegisterBank* CurBank = nullptr

¶virtual llvm::RegisterBankInfo::
    InstructionMappings
    getInstrAlternativeMappings(
        const llvm::MachineInstr& MI) const

Description

Get the alternative mappings for \p MI. Alternative in the sense different from getInstrMapping.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:686

Parameters

const llvm::MachineInstr& MI

¶virtual const llvm::RegisterBankInfo::
    InstructionMapping&
    getInstrMapping(
        const llvm::MachineInstr& MI) const

Description

Get the mapping of the different operands of \p MI on the register bank. This mapping should be the direct translation of \p MI. In other words, when \p MI is mapped with the returned mapping, only the register banks of the operands of \p MI need to be updated. In particular, neither the opcode nor the type of \p MI needs to be updated for this direct mapping. The target independent implementation gives a mapping based on the register classes for the target specific opcode. It uses the ID RegisterBankInfo::DefaultMappingID for that mapping. Make sure you do not use that ID for the alternative mapping for MI. See getInstrAlternativeMappings for the alternative mappings. For instance, if \p MI is a vector add, the mapping should not be a scalarization of the add.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:681

Parameters

const llvm::MachineInstr& MI

¶const llvm::RegisterBankInfo::InstructionMapping&
getInstrMappingImpl(
    const llvm::MachineInstr& MI) const

Description

Try to get the mapping of \p MI. See getInstrMapping for more details on what a mapping represents. Unlike getInstrMapping the returned InstructionMapping may be invalid (isValid() == false). This means that the target independent code is not smart enough to get the mapping of \p MI and thus, the target has to provide the information for \p MI. This implementation is able to get the mapping of: - Target specific instructions by looking at the encoding constraints. - Any instruction if all the register operands have already been assigned a register, a register class, or a register bank. - Copies and phis if at least one of the operands has been assigned a register, a register class, or a register bank. In other words, this method will likely fail to find a mapping for any generic opcode that has not been lowered by target specific code.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:458

Parameters

const llvm::MachineInstr& MI

¶llvm::RegisterBankInfo::InstructionMappings
getInstrPossibleMappings(
    const llvm::MachineInstr& MI) const

Description

Get the possible mapping for \p MI. A mapping defines where the different operands may live and at what cost. For instance, let us consider: v0(16) = G_ADD < 2 x i8> v1, v2 The possible mapping could be: {/*ID*/VectorAdd, /*Cost*/1, /*v0*/{(0xFFFF, VPR)}, /*v1*/{(0xFFFF, VPR)}, /*v2*/{(0xFFFF, VPR)}} {/*ID*/ScalarAddx2, /*Cost*/2, /*v0*/{(0x00FF, GPR),(0xFF00, GPR)}, /*v1*/{(0x00FF, GPR),(0xFF00, GPR)}, /*v2*/{(0x00FF, GPR),(0xFF00, GPR)}}

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:704

Parameters

const llvm::MachineInstr& MI

¶const llvm::RegisterBankInfo::InstructionMapping&
getInstructionMapping(
    unsigned int ID,
    unsigned int Cost,
    const llvm::RegisterBankInfo::ValueMapping*
        OperandsMapping,
    unsigned int NumOperands) const

Description

Method to get a uniquely generated InstructionMapping.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:525

Parameters

unsigned int ID

unsigned int Cost

const llvm::RegisterBankInfo::ValueMapping* OperandsMapping

unsigned int NumOperands

¶const llvm::RegisterBankInfo::InstructionMapping&
getInvalidInstructionMapping() const

Description

Method to get a uniquely generated invalid InstructionMapping.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:533

¶const llvm::TargetRegisterClass&
getMinimalPhysRegClass(
    llvm::Register Reg,
    const llvm::TargetRegisterInfo& TRI) const

Description

Get the MinimalPhysRegClass for Reg.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:439

Parameters

llvm::Register Reg

const llvm::TargetRegisterInfo& TRI

¶unsigned int getNumRegBanks() const

Description

Get the total number of register banks.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:588

¶template <typename Iterator>
const llvm::RegisterBankInfo::ValueMapping*
getOperandsMapping(Iterator Begin,
                   Iterator End) const

Description

Get the uniquely generated array of ValueMapping for the elements of between \p Begin and \p End. Elements that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:492

Templates

Iterator

Parameters

Iterator Begin

Iterator End

¶const llvm::RegisterBankInfo::ValueMapping*
getOperandsMapping(
    std::initializer_list<const ValueMapping*>
        OpdsMapping) const

Description

Get the uniquely generated array of ValueMapping for the given arguments. Arguments that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:507

Parameters

std::initializer_list<const ValueMapping*> OpdsMapping

¶const llvm::RegisterBankInfo::ValueMapping*
getOperandsMapping(
    const SmallVectorImpl<
        const llvm::RegisterBankInfo::
            ValueMapping*>& OpdsMapping) const

Description

Get the uniquely generated array of ValueMapping for the elements of \p OpdsMapping. Elements of \p OpdsMapping that are nullptr will be replaced by invalid ValueMapping (ValueMapping::isValid == false).

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:499

Parameters

const SmallVectorImpl< const llvm::RegisterBankInfo::ValueMapping*>& OpdsMapping

¶const llvm::RegisterBankInfo::PartialMapping&
getPartialMapping(
    unsigned int StartIdx,
    unsigned int Length,
    const llvm::RegisterBank& RegBank) const

Description

Get the uniquely generated PartialMapping for the given arguments.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:462

Parameters

unsigned int StartIdx

unsigned int Length

const llvm::RegisterBank& RegBank

¶const llvm::RegisterBank* getRegBank(
    llvm::Register Reg,
    const llvm::MachineRegisterInfo& MRI,
    const llvm::TargetRegisterInfo& TRI) const

Description

Get the register bank of \p Reg. If Reg has not been assigned a register, a register class, or a register bank, then this returns nullptr.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:584

Parameters

llvm::Register Reg

const llvm::MachineRegisterInfo& MRI

const llvm::TargetRegisterInfo& TRI

¶const llvm::RegisterBank& getRegBank(
    unsigned int ID) const

Description

Get the register bank identified by \p ID.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:575

Parameters

unsigned int ID

¶llvm::RegisterBank& getRegBank(unsigned int ID)

Description

Get the register bank identified by \p ID.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:431

Parameters

unsigned int ID

¶const llvm::RegisterBank*
getRegBankFromConstraints(
    const llvm::MachineInstr& MI,
    unsigned int OpIdx,
    const llvm::TargetInstrInfo& TII,
    const llvm::MachineRegisterInfo& MRI) const

Description

Get the register bank for the \p OpIdx-th operand of \p MI form the encoding constraints, if any.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:545

Parameters

const llvm::MachineInstr& MI

unsigned int OpIdx

const llvm::TargetInstrInfo& TII

const llvm::MachineRegisterInfo& MRI

Returns

A register bank that covers the register class of the related encoding constraints or nullptr if \p MI did not provide enough information to deduce it.

¶virtual const llvm::RegisterBank&
getRegBankFromRegClass(
    const llvm::TargetRegisterClass& RC,
    llvm::LLT Ty) const

Description

Get a register bank that covers \p RC.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:603

Parameters

const llvm::TargetRegisterClass& RC

llvm::LLT Ty

¶unsigned int getSizeInBits(
    llvm::Register Reg,
    const llvm::MachineRegisterInfo& MRI,
    const llvm::TargetRegisterInfo& TRI) const

Description

Get the size in bits of \p Reg. Utility method to get the size of any registers. Unlike MachineRegisterInfo::getSize, the register does not need to be a virtual register.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:730

Parameters

llvm::Register Reg

const llvm::MachineRegisterInfo& MRI

const llvm::TargetRegisterInfo& TRI

¶const llvm::RegisterBankInfo::ValueMapping&
getValueMapping(
    const llvm::RegisterBankInfo::PartialMapping*
        BreakDown,
    unsigned int NumBreakDowns) const

Description

Get the ValueMapping for the given arguments.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:474

Parameters

const llvm::RegisterBankInfo::PartialMapping* BreakDown

unsigned int NumBreakDowns

¶const llvm::RegisterBankInfo::ValueMapping&
getValueMapping(
    unsigned int StartIdx,
    unsigned int Length,
    const llvm::RegisterBank& RegBank) const

Description

The most common ValueMapping consists of a single PartialMapping. Feature a method for that.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:470

Parameters

unsigned int StartIdx

unsigned int Length

const llvm::RegisterBank& RegBank

¶bool verify(
    const llvm::TargetRegisterInfo& TRI) const

Description

Check that information hold by this instance make sense for the given \p TRI.

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:739

Parameters

const llvm::TargetRegisterInfo& TRI

Returns

True is the check was successful.

¶virtual ~RegisterBankInfo()

Declared at: llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h:572