class MachineOperand

Declaration

class MachineOperand { /* full declaration omitted */ };

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:50

Method Overview

  • public void ChangeToES(const char * SymName, unsigned int TargetFlags = 0)
  • public void ChangeToFPImmediate(const llvm::ConstantFP * FPImm)
  • public void ChangeToFrameIndex(int Idx)
  • public void ChangeToGA(const llvm::GlobalValue * GV, int64_t Offset, unsigned int TargetFlags = 0)
  • public void ChangeToImmediate(int64_t ImmVal)
  • public void ChangeToMCSymbol(llvm::MCSymbol * Sym)
  • public void ChangeToRegister(llvm::Register Reg, bool isDef, bool isImp = false, bool isKill = false, bool isDead = false, bool isUndef = false, bool isDebug = false)
  • public void ChangeToTargetIndex(unsigned int Idx, int64_t Offset, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateBA(const llvm::BlockAddress * BA, int64_t Offset, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateCFIIndex(unsigned int CFIIndex)
  • public static llvm::MachineOperand CreateCImm(const llvm::ConstantInt * CI)
  • public static llvm::MachineOperand CreateCPI(unsigned int Idx, int Offset, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateES(const char * SymName, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateFI(int Idx)
  • public static llvm::MachineOperand CreateFPImm(const llvm::ConstantFP * CFP)
  • public static llvm::MachineOperand CreateGA(const llvm::GlobalValue * GV, int64_t Offset, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateImm(int64_t Val)
  • public static llvm::MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
  • public static llvm::MachineOperand CreateJTI(unsigned int Idx, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateMBB(llvm::MachineBasicBlock * MBB, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateMCSymbol(llvm::MCSymbol * Sym, unsigned int TargetFlags = 0)
  • public static llvm::MachineOperand CreateMetadata(const llvm::MDNode * Meta)
  • public static llvm::MachineOperand CreatePredicate(unsigned int Pred)
  • public static llvm::MachineOperand CreateReg(llvm::Register Reg, bool isDef, bool isImp = false, bool isKill = false, bool isDead = false, bool isUndef = false, bool isEarlyClobber = false, unsigned int SubReg = 0, bool isDebug = false, bool isInternalRead = false, bool isRenamable = false)
  • public static llvm::MachineOperand CreateRegLiveOut(const uint32_t * Mask)
  • public static llvm::MachineOperand CreateRegMask(const uint32_t * Mask)
  • public static llvm::MachineOperand CreateShuffleMask(ArrayRef<int> Mask)
  • public static llvm::MachineOperand CreateTargetIndex(unsigned int Idx, int64_t Offset, unsigned int TargetFlags = 0)
  • public void addTargetFlag(unsigned int F)
  • public void clearParent()
  • public static bool clobbersPhysReg(const uint32_t * RegMask, unsigned int PhysReg)
  • public bool clobbersPhysReg(unsigned int PhysReg) const
  • public void dump() const
  • public const llvm::BlockAddress * getBlockAddress() const
  • public unsigned int getCFIIndex() const
  • public const llvm::ConstantInt * getCImm() const
  • public const llvm::ConstantFP * getFPImm() const
  • public const llvm::GlobalValue * getGlobal() const
  • public int64_t getImm() const
  • public int getIndex() const
  • public Intrinsic::ID getIntrinsicID() const
  • public llvm::MachineBasicBlock * getMBB() const
  • public llvm::MCSymbol * getMCSymbol() const
  • public const llvm::MDNode * getMetadata() const
  • public int64_t getOffset() const
  • public const llvm::MachineInstr * getParent() const
  • public llvm::MachineInstr * getParent()
  • public unsigned int getPredicate() const
  • public llvm::Register getReg() const
  • public const uint32_t * getRegLiveOut() const
  • public const uint32_t * getRegMask() const
  • public static unsigned int getRegMaskSize(unsigned int NumRegs)
  • public ArrayRef<int> getShuffleMask() const
  • public unsigned int getSubReg() const
  • public const char * getSymbolName() const
  • public unsigned int getTargetFlags() const
  • public llvm::MachineOperand::MachineOperandType getType() const
  • public bool isBlockAddress() const
  • public bool isCFIIndex() const
  • public bool isCImm() const
  • public bool isCPI() const
  • public bool isDead() const
  • public bool isDebug() const
  • public bool isDef() const
  • public bool isEarlyClobber() const
  • public bool isFI() const
  • public bool isFPImm() const
  • public bool isGlobal() const
  • public bool isIdenticalTo(const llvm::MachineOperand & Other) const
  • public bool isImm() const
  • public bool isImplicit() const
  • public bool isInternalRead() const
  • public bool isIntrinsicID() const
  • public bool isJTI() const
  • public bool isKill() const
  • public bool isMBB() const
  • public bool isMCSymbol() const
  • public bool isMetadata() const
  • public bool isPredicate() const
  • public bool isReg() const
  • public bool isRegLiveOut() const
  • public bool isRegMask() const
  • public bool isRenamable() const
  • public bool isShuffleMask() const
  • public bool isSymbol() const
  • public bool isTargetIndex() const
  • public bool isTied() const
  • public bool isUndef() const
  • public bool isUse() const
  • public void print(llvm::raw_ostream & os, llvm::ModuleSlotTracker & MST, llvm::LLT TypeToPrint, Optional<unsigned int> OpIdx, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned int TiedOperandIdx, const llvm::TargetRegisterInfo * TRI, const llvm::TargetIntrinsicInfo * IntrinsicInfo) const
  • public void print(llvm::raw_ostream & os, llvm::LLT TypeToPrint, const llvm::TargetRegisterInfo * TRI = nullptr, const llvm::TargetIntrinsicInfo * IntrinsicInfo = nullptr) const
  • public void print(llvm::raw_ostream & os, const llvm::TargetRegisterInfo * TRI = nullptr, const llvm::TargetIntrinsicInfo * IntrinsicInfo = nullptr) const
  • public static void printIRSlotNumber(llvm::raw_ostream & OS, int Slot)
  • public static void printOperandOffset(llvm::raw_ostream & OS, int64_t Offset)
  • public static void printStackObjectReference(llvm::raw_ostream & OS, unsigned int FrameIndex, bool IsFixed, llvm::StringRef Name)
  • public static void printSubRegIdx(llvm::raw_ostream & OS, uint64_t Index, const llvm::TargetRegisterInfo * TRI)
  • public static void printSymbol(llvm::raw_ostream & OS, llvm::MCSymbol & Sym)
  • public static void printTargetFlags(llvm::raw_ostream & OS, const llvm::MachineOperand & Op)
  • public bool readsReg() const
  • public void setCImm(const llvm::ConstantInt * CI)
  • public void setFPImm(const llvm::ConstantFP * CFP)
  • public void setImm(int64_t immVal)
  • public void setImplicit(bool Val = true)
  • public void setIndex(int Idx)
  • public void setIsDead(bool Val = true)
  • public void setIsDebug(bool Val = true)
  • public void setIsDef(bool Val = true)
  • public void setIsEarlyClobber(bool Val = true)
  • public void setIsInternalRead(bool Val = true)
  • public void setIsKill(bool Val = true)
  • public void setIsRenamable(bool Val = true)
  • public void setIsUndef(bool Val = true)
  • public void setIsUse(bool Val = true)
  • public void setMBB(llvm::MachineBasicBlock * MBB)
  • public void setMetadata(const llvm::MDNode * MD)
  • public void setOffset(int64_t Offset)
  • public void setPredicate(unsigned int Predicate)
  • public void setReg(llvm::Register Reg)
  • public void setRegMask(const uint32_t * RegMaskPtr)
  • public void setSubReg(unsigned int subReg)
  • public void setTargetFlags(unsigned int F)
  • public void substPhysReg(llvm::MCRegister Reg, const llvm::TargetRegisterInfo &)
  • public void substVirtReg(llvm::Register Reg, unsigned int SubIdx, const llvm::TargetRegisterInfo &)

Methods

void ChangeToES(const char* SymName,
                unsigned int TargetFlags = 0)

Description

ChangeToES - Replace this operand with a new external symbol operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:734

Parameters

const char* SymName
unsigned int TargetFlags = 0

void ChangeToFPImmediate(
    const llvm::ConstantFP* FPImm)

Description

ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. If an operand is known to be an FP immediate already, the setFPImm method should be used.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:731

Parameters

const llvm::ConstantFP* FPImm

void ChangeToFrameIndex(int Idx)

Description

Replace this operand with a frame index.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:744

Parameters

int Idx

void ChangeToGA(const llvm::GlobalValue* GV,
                int64_t Offset,
                unsigned int TargetFlags = 0)

Description

ChangeToGA - Replace this operand with a new global address operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:737

Parameters

const llvm::GlobalValue* GV
int64_t Offset
unsigned int TargetFlags = 0

void ChangeToImmediate(int64_t ImmVal)

Description

ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. If an operand is known to be an immediate already, the setImm method should be used.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:726

Parameters

int64_t ImmVal

void ChangeToMCSymbol(llvm::MCSymbol* Sym)

Description

ChangeToMCSymbol - Replace this operand with a new MC symbol operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:741

Parameters

llvm::MCSymbol* Sym

void ChangeToRegister(llvm::Register Reg,
                      bool isDef,
                      bool isImp = false,
                      bool isKill = false,
                      bool isDead = false,
                      bool isUndef = false,
                      bool isDebug = false)

Description

ChangeToRegister - Replace this operand with a new register operand of the specified value. If an operand is known to be an register already, the setReg method should be used.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:753

Parameters

llvm::Register Reg
bool isDef
bool isImp = false
bool isKill = false
bool isDead = false
bool isUndef = false
bool isDebug = false

void ChangeToTargetIndex(
    unsigned int Idx,
    int64_t Offset,
    unsigned int TargetFlags = 0)

Description

Replace this operand with a target index.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:747

Parameters

unsigned int Idx
int64_t Offset
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateBA(
    const llvm::BlockAddress* BA,
    int64_t Offset,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:854

Parameters

const llvm::BlockAddress* BA
int64_t Offset
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateCFIIndex(
    unsigned int CFIIndex)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:901

Parameters

unsigned int CFIIndex

static llvm::MachineOperand CreateCImm(
    const llvm::ConstantInt* CI)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:767

Parameters

const llvm::ConstantInt* CI

static llvm::MachineOperand CreateCPI(
    unsigned int Idx,
    int Offset,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:816

Parameters

unsigned int Idx
int Offset
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateES(
    const char* SymName,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:846

Parameters

const char* SymName
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateFI(int Idx)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:811

Parameters

int Idx

static llvm::MachineOperand CreateFPImm(
    const llvm::ConstantFP* CFP)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:773

Parameters

const llvm::ConstantFP* CFP

static llvm::MachineOperand CreateGA(
    const llvm::GlobalValue* GV,
    int64_t Offset,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:838

Parameters

const llvm::GlobalValue* GV
int64_t Offset
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateImm(int64_t Val)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:761

Parameters

int64_t Val

static llvm::MachineOperand CreateIntrinsicID(
    Intrinsic::ID ID)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:907

Parameters

Intrinsic::ID ID

static llvm::MachineOperand CreateJTI(
    unsigned int Idx,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:832

Parameters

unsigned int Idx
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateMBB(
    llvm::MachineBasicBlock* MBB,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:804

Parameters

llvm::MachineBasicBlock* MBB
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateMCSymbol(
    llvm::MCSymbol* Sym,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:892

Parameters

llvm::MCSymbol* Sym
unsigned int TargetFlags = 0

static llvm::MachineOperand CreateMetadata(
    const llvm::MDNode* Meta)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:886

Parameters

const llvm::MDNode* Meta

static llvm::MachineOperand CreatePredicate(
    unsigned int Pred)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:913

Parameters

unsigned int Pred

static llvm::MachineOperand CreateReg(
    llvm::Register Reg,
    bool isDef,
    bool isImp = false,
    bool isKill = false,
    bool isDead = false,
    bool isUndef = false,
    bool isEarlyClobber = false,
    unsigned int SubReg = 0,
    bool isDebug = false,
    bool isInternalRead = false,
    bool isRenamable = false)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:779

Parameters

llvm::Register Reg
bool isDef
bool isImp = false
bool isKill = false
bool isDead = false
bool isUndef = false
bool isEarlyClobber = false
unsigned int SubReg = 0
bool isDebug = false
bool isInternalRead = false
bool isRenamable = false

static llvm::MachineOperand CreateRegLiveOut(
    const uint32_t* Mask)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:880

Parameters

const uint32_t* Mask

static llvm::MachineOperand CreateRegMask(
    const uint32_t* Mask)

Description

CreateRegMask - Creates a register mask operand referencing Mask. The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:874

Parameters

const uint32_t* Mask

static llvm::MachineOperand CreateShuffleMask(
    ArrayRef<int> Mask)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:919

Parameters

ArrayRef<int> Mask

static llvm::MachineOperand CreateTargetIndex(
    unsigned int Idx,
    int64_t Offset,
    unsigned int TargetFlags = 0)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:824

Parameters

unsigned int Idx
int64_t Offset
unsigned int TargetFlags = 0

void addTargetFlag(unsigned int F)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:227

Parameters

unsigned int F

void clearParent()

Description

clearParent - Reset the parent pointer. The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared. Never call clearParent() on an operand in a MachineInstr.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:247

static bool clobbersPhysReg(
    const uint32_t* RegMask,
    unsigned int PhysReg)

Description

clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. It is sometimes necessary to detach the register mask pointer from its machine operand. This static method can be used for such detached bit mask pointers.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:615

Parameters

const uint32_t* RegMask
unsigned int PhysReg

bool clobbersPhysReg(unsigned int PhysReg) const

Description

clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:622

Parameters

unsigned int PhysReg

void dump() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:312

const llvm::BlockAddress* getBlockAddress() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:566

unsigned int getCFIIndex() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:576

const llvm::ConstantInt* getCImm() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:540

const llvm::ConstantFP* getFPImm() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:545

const llvm::GlobalValue* getGlobal() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:561

int64_t getImm() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:535

int getIndex() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:555

Intrinsic::ID getIntrinsicID() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:581

llvm::MachineBasicBlock* getMBB() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:550

llvm::MCSymbol* getMCSymbol() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:571

const llvm::MDNode* getMetadata() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:644

int64_t getOffset() const

Description

Return the offset from the symbol in this operand. This always returns 0 for ExternalSymbol operands.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:598

const llvm::MachineInstr* getParent() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:237

llvm::MachineInstr* getParent()

Description

getParent - Return the instruction that this operand belongs to.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:236

unsigned int getPredicate() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:586

llvm::Register getReg() const

Description

getReg - Returns the register number.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:358

const uint32_t* getRegLiveOut() const

Description

getRegLiveOut - Returns a bit mask of live-out registers.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:639

const uint32_t* getRegMask() const

Description

getRegMask - Returns a bit mask of registers preserved by this RegMask operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:628

static unsigned int getRegMaskSize(
    unsigned int NumRegs)

Description

Returns number of elements needed for a regmask array.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:634

Parameters

unsigned int NumRegs

ArrayRef<int> getShuffleMask() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:591

unsigned int getSubReg() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:363

const char* getSymbolName() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:606

unsigned int getTargetFlags() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:219

llvm::MachineOperand::MachineOperandType getType()
    const

Description

getType - Returns the MachineOperandType for this operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:217

bool isBlockAddress() const

Description

isBlockAddress - Tests if this is a MO_BlockAddress operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:341

bool isCFIIndex() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:349

bool isCImm() const

Description

isCImm - Test if this is a MO_CImmediate operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:323

bool isCPI() const

Description

isCPI - Tests if this is a MO_ConstantPoolIndex operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:331

bool isDead() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:383

bool isDebug() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:444

bool isDef() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:373

bool isEarlyClobber() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:434

bool isFI() const

Description

isFI - Tests if this is a MO_FrameIndex operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:329

bool isFPImm() const

Description

isFPImm - Tests if this is a MO_FPImmediate operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:325

bool isGlobal() const

Description

isGlobal - Tests if this is a MO_GlobalAddress operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:337

bool isIdenticalTo(
    const llvm::MachineOperand& Other) const

Description

Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead). Note that this should stay in sync with the hash_value overload below.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:713

Parameters

const llvm::MachineOperand& Other

bool isImm() const

Description

isImm - Tests if this is a MO_Immediate operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:321

bool isImplicit() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:378

bool isInternalRead() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:429

bool isIntrinsicID() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:350

bool isJTI() const

Description

isJTI - Tests if this is a MO_JumpTableIndex operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:335

bool isKill() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:388

bool isMBB() const

Description

isMBB - Tests if this is a MO_MachineBasicBlock operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:327

bool isMCSymbol() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:348

bool isMetadata() const

Description

isMetadata - Tests if this is a MO_Metadata operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:347

bool isPredicate() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:351

bool isReg() const

Description

isReg - Tests if this is a MO_Register operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:319

bool isRegLiveOut() const

Description

isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:345

bool isRegMask() const

Description

isRegMask - Tests if this is a MO_RegisterMask operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:343

bool isRenamable() const

Description

isRenamable - Returns true if this register may be renamed, i.e. it does not generate a value that is somehow read in a way that is not represented by the Machine IR (e.g. to meet an ABI or ISA requirement). This is only valid on physical register operands. Virtual registers are assumed to always be renamable regardless of the value of this field. Operands that are renamable can freely be changed to any other register that is a member of the register class returned by MI->getRegClassConstraint(). isRenamable can return false for several different reasons: - ABI constraints (since liveness is not always precisely modeled). We conservatively handle these cases by setting all physical register operands that didn’t start out as virtual regs to not be renamable. Also any physical register operands created after register allocation or whose register is changed after register allocation will not be renamable. This state is tracked in the MachineOperand::IsRenamable bit. - Opcode/target constraints: for opcodes that have complex register class requirements (e.g. that depend on other operands/instructions), we set hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq in the machine opcode description. Operands belonging to instructions with opcodes that are marked hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq return false from isRenamable(). Additionally, the AllowRegisterRenaming target property prevents any operands from being marked renamable for targets that don't have detailed opcode hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq values.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:427

bool isShuffleMask() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:352

bool isSymbol() const

Description

isSymbol - Tests if this is a MO_ExternalSymbol operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:339

bool isTargetIndex() const

Description

isTargetIndex - Tests if this is a MO_TargetIndex operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:333

bool isTied() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:439

bool isUndef() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:393

bool isUse() const

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:368

void print(llvm::raw_ostream& os,
           llvm::ModuleSlotTracker& MST,
           llvm::LLT TypeToPrint,
           Optional<unsigned int> OpIdx,
           bool PrintDef,
           bool IsStandalone,
           bool ShouldPrintRegisterTies,
           unsigned int TiedOperandIdx,
           const llvm::TargetRegisterInfo* TRI,
           const llvm::TargetIntrinsicInfo*
               IntrinsicInfo) const

Description

More complex way of printing a MachineOperand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:300

Parameters

llvm::raw_ostream& os
llvm::ModuleSlotTracker& MST
llvm::LLT TypeToPrint
specifies the generic type to be printed on uses and defs. It can be determined using MachineInstr::getTypeToPrint.
Optional<unsigned int> OpIdx
- specifies the index of the operand in machine instruction. This will be used by target dependent MIR formatter. Could be None if the index is unknown, e.g. called by dump().
bool PrintDef
- whether we want to print `def` on an operand which isDef. Sometimes, if the operand is printed before '=', we don't print `def`.
bool IsStandalone
- whether we want a verbose output of the MO. This prints extra information that can be easily inferred when printing the whole function, but not when printing only a fragment of it.
bool ShouldPrintRegisterTies
- whether we want to print register ties. Sometimes they are easily determined by the instruction's descriptor (MachineInstr::hasComplexRegiterTies can determine if it's needed).
unsigned int TiedOperandIdx
- if we need to print register ties this needs to provide the index of the tied register. If not, it will be ignored.
const llvm::TargetRegisterInfo* TRI
- provide more target-specific information to the printer. Unlike the previous function, this one will not try and get the information from it's parent.
const llvm::TargetIntrinsicInfo* IntrinsicInfo
- same as \p TRI.

void print(
    llvm::raw_ostream& os,
    llvm::LLT TypeToPrint,
    const llvm::TargetRegisterInfo* TRI = nullptr,
    const llvm::TargetIntrinsicInfo*
        IntrinsicInfo = nullptr) const

Description

Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:308

Parameters

llvm::raw_ostream& os
llvm::LLT TypeToPrint
const llvm::TargetRegisterInfo* TRI = nullptr
const llvm::TargetIntrinsicInfo* IntrinsicInfo = nullptr

void print(
    llvm::raw_ostream& os,
    const llvm::TargetRegisterInfo* TRI = nullptr,
    const llvm::TargetIntrinsicInfo*
        IntrinsicInfo = nullptr) const

Description

Print the MachineOperand to \p os. Providing a valid \p TRI and \p IntrinsicInfo results in a more target-specific printing. If \p TRI and \p IntrinsicInfo are null, the function will try to pick it up from the parent.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:276

Parameters

llvm::raw_ostream& os
const llvm::TargetRegisterInfo* TRI = nullptr
const llvm::TargetIntrinsicInfo* IntrinsicInfo = nullptr

static void printIRSlotNumber(
    llvm::raw_ostream& OS,
    int Slot)

Description

Print an IRSlotNumber.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:270

Parameters

llvm::raw_ostream& OS
int Slot

static void printOperandOffset(
    llvm::raw_ostream& OS,
    int64_t Offset)

Description

Print the offset with explicit +/- signs.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:267

Parameters

llvm::raw_ostream& OS
int64_t Offset

static void printStackObjectReference(
    llvm::raw_ostream& OS,
    unsigned int FrameIndex,
    bool IsFixed,
    llvm::StringRef Name)

Description

Print a stack object reference.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:263

Parameters

llvm::raw_ostream& OS
unsigned int FrameIndex
bool IsFixed
llvm::StringRef Name

static void printSubRegIdx(
    llvm::raw_ostream& OS,
    uint64_t Index,
    const llvm::TargetRegisterInfo* TRI)

Description

Print a subreg index operand. MO_Immediate operands can also be subreg idices. If it's the case, the subreg index name will be printed. MachineInstr::isOperandSubregIdx can be called to check this.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:253

Parameters

llvm::raw_ostream& OS
uint64_t Index
const llvm::TargetRegisterInfo* TRI

static void printSymbol(llvm::raw_ostream& OS,
                        llvm::MCSymbol& Sym)

Description

Print a MCSymbol as an operand.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:260

Parameters

llvm::raw_ostream& OS
llvm::MCSymbol& Sym

static void printTargetFlags(
    llvm::raw_ostream& OS,
    const llvm::MachineOperand& Op)

Description

Print operand target flags.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:257

Parameters

llvm::raw_ostream& OS
const llvm::MachineOperand& Op

bool readsReg() const

Description

readsReg - Returns true if this operand reads the previous value of its register. A use operand with the <undef > flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef > flag is set. This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:456

void setCImm(const llvm::ConstantInt* CI)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:658

Parameters

const llvm::ConstantInt* CI

void setFPImm(const llvm::ConstantFP* CFP)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:663

Parameters

const llvm::ConstantFP* CFP

void setImm(int64_t immVal)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:653

Parameters

int64_t immVal

void setImplicit(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:493

Parameters

bool Val = true

void setIndex(int Idx)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:676

Parameters

int Idx

void setIsDead(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:504

Parameters

bool Val = true

void setIsDebug(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:526

Parameters

bool Val = true

void setIsDef(bool Val = true)

Description

Change a def to a use, or a use to a def.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:491

Parameters

bool Val = true

void setIsEarlyClobber(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:521

Parameters

bool Val = true

void setIsInternalRead(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:516

Parameters

bool Val = true

void setIsKill(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:498

Parameters

bool Val = true

void setIsRenamable(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:514

Parameters

bool Val = true

void setIsUndef(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:509

Parameters

bool Val = true

void setIsUse(bool Val = true)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:488

Parameters

bool Val = true

void setMBB(llvm::MachineBasicBlock* MBB)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:687

Parameters

llvm::MachineBasicBlock* MBB

void setMetadata(const llvm::MDNode* MD)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:682

Parameters

const llvm::MDNode* MD

void setOffset(int64_t Offset)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:668

Parameters

int64_t Offset

void setPredicate(unsigned int Predicate)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:701

Parameters

unsigned int Predicate

void setReg(llvm::Register Reg)

Description

Change the register this operand corresponds to.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:467

Parameters

llvm::Register Reg

void setRegMask(const uint32_t* RegMaskPtr)

Description

Sets value of register mask operand referencing Mask. The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. See CreateRegMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:696

Parameters

const uint32_t* RegMaskPtr

void setSubReg(unsigned int subReg)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:469

Parameters

unsigned int subReg

void setTargetFlags(unsigned int F)

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:222

Parameters

unsigned int F

void substPhysReg(llvm::MCRegister Reg,
                  const llvm::TargetRegisterInfo&)

Description

substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. For instance, substPhysReg(%eax) will change %reg1024:sub_8bit to %al.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:486

Parameters

llvm::MCRegister Reg
const llvm::TargetRegisterInfo& 

void substVirtReg(llvm::Register Reg,
                  unsigned int SubIdx,
                  const llvm::TargetRegisterInfo&)

Description

substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.

Declared at: llvm/include/llvm/CodeGen/MachineOperand.h:480

Parameters

llvm::Register Reg
unsigned int SubIdx
const llvm::TargetRegisterInfo&