class LSUnitBase
Declaration
class LSUnitBase : public HardwareUnit { /* full declaration omitted */ };
Description
Abstract base interface for LS (load/store) units in llvm-mca.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:167
Inherits from: HardwareUnit
Method Overview
- public LSUnitBase(const llvm::MCSchedModel & SM, unsigned int LoadQueueSize, unsigned int StoreQueueSize, bool AssumeNoAlias)
- public void acquireLQSlot()
- public void acquireSQSlot()
- public bool assumeNoAlias() const
- public unsigned int createMemoryGroup()
- public virtual void cycleEvent()
- public virtual unsigned int dispatch(const llvm::mca::InstRef & IR)
- public void dump() const
- public const llvm::mca::MemoryGroup & getGroup(unsigned int Index) const
- public llvm::mca::MemoryGroup & getGroup(unsigned int Index)
- public unsigned int getLoadQueueSize() const
- public unsigned int getStoreQueueSize() const
- public unsigned int getUsedLQEntries() const
- public unsigned int getUsedSQEntries() const
- public bool hasDependentUsers(const llvm::mca::InstRef & IR) const
- public virtual llvm::mca::LSUnitBase::Status isAvailable(const llvm::mca::InstRef & IR) const
- public bool isLQEmpty() const
- public bool isLQFull() const
- public bool isPending(const llvm::mca::InstRef & IR) const
- public bool isReady(const llvm::mca::InstRef & IR) const
- public bool isSQEmpty() const
- public bool isSQFull() const
- public bool isValidGroupID(unsigned int Index) const
- public bool isWaiting(const llvm::mca::InstRef & IR) const
- public virtual void onInstructionExecuted(const llvm::mca::InstRef & IR)
- public virtual void onInstructionIssued(const llvm::mca::InstRef & IR)
- public virtual void onInstructionRetired(const llvm::mca::InstRef & IR)
- public void releaseLQSlot()
- public void releaseSQSlot()
- public virtual ~LSUnitBase()
Inherited from HardwareUnit:
Methods
¶LSUnitBase(const llvm::MCSchedModel& SM,
unsigned int LoadQueueSize,
unsigned int StoreQueueSize,
bool AssumeNoAlias)
LSUnitBase(const llvm::MCSchedModel& SM,
unsigned int LoadQueueSize,
unsigned int StoreQueueSize,
bool AssumeNoAlias)
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:199
Parameters
- const llvm::MCSchedModel& SM
- unsigned int LoadQueueSize
- unsigned int StoreQueueSize
- bool AssumeNoAlias
¶void acquireLQSlot()
void acquireLQSlot()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:212
¶void acquireSQSlot()
void acquireSQSlot()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:213
¶bool assumeNoAlias() const
bool assumeNoAlias() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:217
¶unsigned int createMemoryGroup()
unsigned int createMemoryGroup()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:288
¶virtual void cycleEvent()
virtual void cycleEvent()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:307
¶virtual unsigned int dispatch(
const llvm::mca::InstRef& IR)
virtual unsigned int dispatch(
const llvm::mca::InstRef& IR)
Description
Allocates LS resources for instruction IR. This method assumes that a previous call to `isAvailable(IR)` succeeded with a LSUnitBase::Status value of LSU_AVAILABLE. Returns the GroupID associated with this instruction. That value will be used to set the LSUTokenID field in class Instruction.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:238
Parameters
- const llvm::mca::InstRef& IR
¶void dump() const
void dump() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:310
¶const llvm::mca::MemoryGroup& getGroup(
unsigned int Index) const
const llvm::mca::MemoryGroup& getGroup(
unsigned int Index) const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:278
Parameters
- unsigned int Index
¶llvm::mca::MemoryGroup& getGroup(
unsigned int Index)
llvm::mca::MemoryGroup& getGroup(
unsigned int Index)
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:283
Parameters
- unsigned int Index
¶unsigned int getLoadQueueSize() const
unsigned int getLoadQueueSize() const
Description
Returns the total number of entries in the load queue.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:205
¶unsigned int getStoreQueueSize() const
unsigned int getStoreQueueSize() const
Description
Returns the total number of entries in the store queue.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:208
¶unsigned int getUsedLQEntries() const
unsigned int getUsedLQEntries() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:210
¶unsigned int getUsedSQEntries() const
unsigned int getUsedSQEntries() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:211
¶bool hasDependentUsers(
const llvm::mca::InstRef& IR) const
bool hasDependentUsers(
const llvm::mca::InstRef& IR) const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:272
Parameters
- const llvm::mca::InstRef& IR
¶virtual llvm::mca::LSUnitBase::Status isAvailable(
const llvm::mca::InstRef& IR) const
virtual llvm::mca::LSUnitBase::Status isAvailable(
const llvm::mca::InstRef& IR) const
Description
This method checks the availability of the load/store buffers. Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is not a memory operation.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:230
Parameters
- const llvm::mca::InstRef& IR
¶bool isLQEmpty() const
bool isLQEmpty() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:241
¶bool isLQFull() const
bool isLQFull() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:243
¶bool isPending(const llvm::mca::InstRef& IR) const
bool isPending(const llvm::mca::InstRef& IR) const
Description
Check if instruction IR only depends on memory instructions that are currently executing.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:258
Parameters
- const llvm::mca::InstRef& IR
¶bool isReady(const llvm::mca::InstRef& IR) const
bool isReady(const llvm::mca::InstRef& IR) const
Description
Check if a peviously dispatched instruction IR is now ready for execution.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:250
Parameters
- const llvm::mca::InstRef& IR
¶bool isSQEmpty() const
bool isSQEmpty() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:240
¶bool isSQFull() const
bool isSQFull() const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:242
¶bool isValidGroupID(unsigned int Index) const
bool isValidGroupID(unsigned int Index) const
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:245
Parameters
- unsigned int Index
¶bool isWaiting(const llvm::mca::InstRef& IR) const
bool isWaiting(const llvm::mca::InstRef& IR) const
Description
Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:266
Parameters
- const llvm::mca::InstRef& IR
¶virtual void onInstructionExecuted(
const llvm::mca::InstRef& IR)
virtual void onInstructionExecuted(
const llvm::mca::InstRef& IR)
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:294
Parameters
- const llvm::mca::InstRef& IR
¶virtual void onInstructionIssued(
const llvm::mca::InstRef& IR)
virtual void onInstructionIssued(
const llvm::mca::InstRef& IR)
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:302
Parameters
- const llvm::mca::InstRef& IR
¶virtual void onInstructionRetired(
const llvm::mca::InstRef& IR)
virtual void onInstructionRetired(
const llvm::mca::InstRef& IR)
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:300
Parameters
- const llvm::mca::InstRef& IR
¶void releaseLQSlot()
void releaseLQSlot()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:214
¶void releaseSQSlot()
void releaseSQSlot()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:215
¶virtual ~LSUnitBase()
virtual ~LSUnitBase()
Declared at: llvm/include/llvm/MCA/HardwareUnits/LSUnit.h:202