class SelectionDAGISel

Declaration

class SelectionDAGISel : public MachineFunctionPass { /* full declaration omitted */ };

Description

SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:47

Inherits from: MachineFunctionPass

Member Variables

public llvm::TargetMachine& TM

public const llvm::TargetLibraryInfo* LibInfo

public std::unique_ptr<FunctionLoweringInfo> FuncInfo

public llvm::SwiftErrorValueTracking* SwiftError

public llvm::MachineFunction* MF

public llvm::MachineRegisterInfo* RegInfo

public llvm::SelectionDAG* CurDAG

public std::unique_ptr<SelectionDAGBuilder> SDB

public llvm::AAResults* AA

public llvm::GCFunctionInfo* GFI

public CodeGenOpt::Level OptLevel

public const llvm::TargetInstrInfo* TII

public const llvm::TargetLowering* TLI

public bool FastISelFailed

public SmallPtrSet<const llvm::Instruction*, 4> ElidedArgCopyInstrs

public std::unique_ptr<OptimizationRemarkEmitter> ORE

Current optimization remark emitter. Used to report things like combines and FastISel failures.

protected unsigned int DAGSize

DAGSize - Size of DAG being instruction selected.

public static char ID

Method Overview

• public bool CheckAndMask(llvm::SDValue LHS, llvm::ConstantSDNode * RHS, int64_t DesiredMaskS) const
• public virtual bool CheckComplexPattern(llvm::SDNode * Root, llvm::SDNode * Parent, llvm::SDValue N, unsigned int PatternNo, SmallVectorImpl<std::pair<SDValue, SDNode *>> & Result)
• public virtual bool CheckNodePredicate(llvm::SDNode * N, unsigned int PredNo) const
• public virtual bool CheckNodePredicateWithOperands(llvm::SDNode * N, unsigned int PredNo, const SmallVectorImpl<llvm::SDValue> & Operands) const
• public bool CheckOrMask(llvm::SDValue LHS, llvm::ConstantSDNode * RHS, int64_t DesiredMaskS) const
• public virtual bool CheckPatternPredicate(unsigned int PredNo) const
• public virtual bool ComplexPatternFuncMutatesDAG() const
• public virtual void EmitFunctionEntryCode()
• public static void EnforceNodeIdInvariant(llvm::SDNode * N)
• public static void InvalidateNodeId(llvm::SDNode * N)
• public static bool IsLegalToFold(llvm::SDValue N, llvm::SDNode * U, llvm::SDNode * Root, CodeGenOpt::Level OptLevel, bool IgnoreChains = false)
• public virtual bool IsProfitableToFold(llvm::SDValue N, llvm::SDNode * U, llvm::SDNode * Root) const
• public virtual void PostprocessISelDAG()
• public virtual void PreprocessISelDAG()
• protected void ReplaceNode(llvm::SDNode * F, llvm::SDNode * T)
• protected void ReplaceUses(llvm::SDValue F, llvm::SDValue T)
• protected void ReplaceUses(const llvm::SDValue * F, const llvm::SDValue * T, unsigned int Num)
• protected void ReplaceUses(llvm::SDNode * F, llvm::SDNode * T)
• public virtual llvm::SDValue RunSDNodeXForm(llvm::SDValue V, unsigned int XFormNo)
• public virtual void Select(llvm::SDNode * N)
• public void SelectCodeCommon(llvm::SDNode * NodeToMatch, const unsigned char * MatcherTable, unsigned int TableSize)
• public virtual bool SelectInlineAsmMemoryOperand(const llvm::SDValue & Op, unsigned int ConstraintID, std::vector<SDValue> & OutOps)
• protected void SelectInlineAsmMemoryOperands(std::vector<SDValue> & Ops, const llvm::SDLoc & DL)
• public SelectionDAGISel(llvm::TargetMachine & tm, CodeGenOpt::Level OL = CodeGenOpt::Default)
• public void getAnalysisUsage(llvm::AnalysisUsage & AU) const
• protected virtual llvm::StringRef getIncludePathForIndex(unsigned int index)
• public static inline int getNumFixedFromVariadicInfo(unsigned int Flags)
• protected virtual llvm::StringRef getPatternForIndex(unsigned int index)
• public const llvm::TargetLowering * getTargetLowering() const
• public static int getUninvalidatedNodeId(llvm::SDNode * N)
• public bool isOrEquivalentToAdd(const llvm::SDNode * N) const
• public bool mayRaiseFPException(llvm::SDNode * Node) const
• public bool runOnMachineFunction(llvm::MachineFunction & MF)
• protected bool shouldOptForSize(const llvm::MachineFunction * MF) const
• public ~SelectionDAGISel()

Inherited from MachineFunctionPass:

• public doInitialization
• protected getAnalysisUsage
• protected getClearedProperties
• protected getRequiredProperties
• protected getSetProperties
• protected runOnMachineFunction

Inherited from FunctionPass:

• public assignPassManager
• public createPrinterPass
• public getPotentialPassManagerType
• public runOnFunction
• protected skipFunction

Inherited from Pass:

• public assignPassManager
• public createPass
• public createPrinterPass
• public doFinalization
• public doInitialization
• public dump
• public dumpPassStructure
• public getAdjustedAnalysisPointer
• public getAnalysis
• public getAnalysis
• public getAnalysisID
• public getAnalysisID
• public getAnalysisIfAvailable
• public getAnalysisUsage
• public getAsImmutablePass
• public getAsPMDataManager
• public getPassID
• public getPassKind
• public getPassName
• public getPotentialPassManagerType
• public getResolver
• public lookupPassInfo
• public lookupPassInfo
• public mustPreserveAnalysisID
• public preparePassManager
• public print
• public releaseMemory
• public setResolver
• public verifyAnalysis

Methods

¶bool CheckAndMask(llvm::SDValue LHS,
                  llvm::ConstantSDNode* RHS,
                  int64_t DesiredMaskS) const

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:261

Parameters

llvm::SDValue LHS

llvm::ConstantSDNode* RHS

int64_t DesiredMaskS

¶virtual bool CheckComplexPattern(
    llvm::SDNode* Root,
    llvm::SDNode* Parent,
    llvm::SDValue N,
    unsigned int PatternNo,
    SmallVectorImpl<std::pair<SDValue, SDNode*>>&
        Result)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:294

Parameters

llvm::SDNode* Root

llvm::SDNode* Parent

llvm::SDValue N

unsigned int PatternNo

SmallVectorImpl<std::pair<SDValue, SDNode*>>& Result

¶virtual bool CheckNodePredicate(
    llvm::SDNode* N,
    unsigned int PredNo) const

Description

CheckNodePredicate - This function is generated by tblgen in the target. It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:279

Parameters

llvm::SDNode* N

unsigned int PredNo

¶virtual bool CheckNodePredicateWithOperands(
    llvm::SDNode* N,
    unsigned int PredNo,
    const SmallVectorImpl<llvm::SDValue>&
        Operands) const

Description

CheckNodePredicateWithOperands - This function is generated by tblgen in the target. It runs node predicate number PredNo and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:288

Parameters

llvm::SDNode* N

unsigned int PredNo

const SmallVectorImpl<llvm::SDValue>& Operands

¶bool CheckOrMask(llvm::SDValue LHS,
                 llvm::ConstantSDNode* RHS,
                 int64_t DesiredMaskS) const

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:263

Parameters

llvm::SDValue LHS

llvm::ConstantSDNode* RHS

int64_t DesiredMaskS

¶virtual bool CheckPatternPredicate(
    unsigned int PredNo) const

Description

CheckPatternPredicate - This function is generated by tblgen in the target. It runs the specified pattern predicate and returns true if it succeeds or false if it fails. The number is a private implementation detail to the code tblgen produces.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:271

Parameters

unsigned int PredNo

¶virtual bool ComplexPatternFuncMutatesDAG() const

Description

Return true if complex patterns for this target can mutate the DAG.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:309

¶virtual void EmitFunctionEntryCode()

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:81

¶static void EnforceNodeIdInvariant(
    llvm::SDNode* N)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:120

Parameters

llvm::SDNode* N

¶static void InvalidateNodeId(llvm::SDNode* N)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:117

Parameters

llvm::SDNode* N

¶static bool IsLegalToFold(
    llvm::SDValue N,
    llvm::SDNode* U,
    llvm::SDNode* Root,
    CodeGenOpt::Level OptLevel,
    bool IgnoreChains = false)

Description

IsLegalToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root. FIXME: This is a static member function because the MSP430/X86 targets, which uses it during isel. This could become a proper member.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:113

Parameters

llvm::SDValue N

llvm::SDNode* U

llvm::SDNode* Root

CodeGenOpt::Level OptLevel

bool IgnoreChains = false

¶virtual bool IsProfitableToFold(
    llvm::SDValue N,
    llvm::SDNode* U,
    llvm::SDNode* Root) const

Description

IsProfitableToFold - Returns true if it's profitable to fold the specific operand node N of U during instruction selection that starts at Root.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:107

Parameters

llvm::SDValue N

llvm::SDNode* U

llvm::SDNode* Root

¶virtual void PostprocessISelDAG()

Description

PostprocessISelDAG() - This hook allows the target to hack on the graph right after selection.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:89

¶virtual void PreprocessISelDAG()

Description

PreprocessISelDAG - This hook allows targets to hack on the graph before instruction selection starts.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:85

¶void ReplaceNode(llvm::SDNode* F, llvm::SDNode* T)

Description

Replace all uses of \c F with \c T, then remove \c F from the DAG.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:234

Parameters

llvm::SDNode* F

llvm::SDNode* T

¶void ReplaceUses(llvm::SDValue F, llvm::SDValue T)

Description

ReplaceUses - replace all uses of the old node F with the use of the new node T.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:213

Parameters

llvm::SDValue F

llvm::SDValue T

¶void ReplaceUses(const llvm::SDValue* F,
                 const llvm::SDValue* T,
                 unsigned int Num)

Description

ReplaceUses - replace all uses of the old nodes F with the use of the new nodes T.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:220

Parameters

const llvm::SDValue* F

const llvm::SDValue* T

unsigned int Num

¶void ReplaceUses(llvm::SDNode* F, llvm::SDNode* T)

Description

ReplaceUses - replace all uses of the old node F with the use of the new node T.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:228

Parameters

llvm::SDNode* F

llvm::SDNode* T

¶virtual llvm::SDValue RunSDNodeXForm(
    llvm::SDValue V,
    unsigned int XFormNo)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:300

Parameters

llvm::SDValue V

unsigned int XFormNo

¶virtual void Select(llvm::SDNode* N)

Description

Main hook for targets to transform nodes into machine nodes.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:92

Parameters

llvm::SDNode* N

¶void SelectCodeCommon(
    llvm::SDNode* NodeToMatch,
    const unsigned char* MatcherTable,
    unsigned int TableSize)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:304

Parameters

llvm::SDNode* NodeToMatch

const unsigned char* MatcherTable

unsigned int TableSize

¶virtual bool SelectInlineAsmMemoryOperand(
    const llvm::SDValue& Op,
    unsigned int ConstraintID,
    std::vector<SDValue>& OutOps)

Description

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint. If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:99

Parameters

const llvm::SDValue& Op

unsigned int ConstraintID

std::vector<SDValue>& OutOps

¶void SelectInlineAsmMemoryOperands(
    std::vector<SDValue>& Ops,
    const llvm::SDLoc& DL)

Description

SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. Others should not call it.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:242

Parameters

std::vector<SDValue>& Ops

const llvm::SDLoc& DL

¶SelectionDAGISel(
    llvm::TargetMachine& tm,
    CodeGenOpt::Level OL = CodeGenOpt::Default)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:71

Parameters

llvm::TargetMachine& tm

CodeGenOpt::Level OL = CodeGenOpt::Default

¶void getAnalysisUsage(
    llvm::AnalysisUsage& AU) const

Description

getAnalysisUsage - Subclasses that override getAnalysisUsage must call this. For MachineFunctionPasses, calling AU.preservesCFG() indicates that the pass does not modify the MachineBasicBlock CFG.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:77

Parameters

llvm::AnalysisUsage& AU

¶virtual llvm::StringRef getIncludePathForIndex(
    unsigned int index)

Description

getIncludePathForIndex - get the td source location of pattern instantiation

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:251

Parameters

unsigned int index

¶static inline int getNumFixedFromVariadicInfo(
    unsigned int Flags)

Description

getNumFixedFromVariadicInfo - Transform an EmitNode flags word into the number of fixed arity values that should be skipped when copying from the root.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:201

Parameters

unsigned int Flags

¶virtual llvm::StringRef getPatternForIndex(
    unsigned int index)

Description

getPatternForIndex - Patterns selected by tablegen during ISEL

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:246

Parameters

unsigned int index

¶const llvm::TargetLowering* getTargetLowering()
    const

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:75

¶static int getUninvalidatedNodeId(llvm::SDNode* N)

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:118

Parameters

llvm::SDNode* N

¶bool isOrEquivalentToAdd(
    const llvm::SDNode* N) const

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:316

Parameters

const llvm::SDNode* N

¶bool mayRaiseFPException(llvm::SDNode* Node) const

Description

Return whether the node may raise an FP exception.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:314

Parameters

llvm::SDNode* Node

¶bool runOnMachineFunction(
    llvm::MachineFunction& MF)

Description

runOnMachineFunction - This method must be overloaded to perform the desired machine code transformation or analysis.

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:79

Parameters

llvm::MachineFunction& MF

¶bool shouldOptForSize(
    const llvm::MachineFunction* MF) const

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:255

Parameters

const llvm::MachineFunction* MF

¶~SelectionDAGISel()

Declared at: llvm/include/llvm/CodeGen/SelectionDAGISel.h:73