enum SDep::OrderKind

Declared at: llvm/include/llvm/CodeGen/ScheduleDAG.h:68

Enumerators

NameValueComment
Barrier0An unknown scheduling barrier.
MayAliasMem1Nonvolatile load/Store instructions that may alias.
MustAliasMem2Nonvolatile load/Store instructions that must alias.
Artificial3Arbitrary strong DAG edge (no real dependence).
Weak4Arbitrary weak DAG edge.
Cluster5Weak DAG edge linking a chain of clustered instrs.