class GenericScheduler
Declaration
class GenericScheduler : public GenericSchedulerBase { /* full declaration omitted */ };
Description
GenericScheduler shrinks the unscheduled zone using heuristics to balance the schedule.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:937
Inherits from: GenericSchedulerBase
Member Variables
- protected llvm::ScheduleDAGMILive* DAG = nullptr
- protected llvm::MachineSchedPolicy RegionPolicy
- protected llvm::SchedBoundary Top
- protected llvm::SchedBoundary Bot
- protected llvm::GenericSchedulerBase::SchedCandidate TopCand
- Candidate last picked from Top boundary.
- protected llvm::GenericSchedulerBase::SchedCandidate BotCand
- Candidate last picked from Bot boundary.
Inherited from GenericSchedulerBase:
- protected Context
- protected SchedModel = nullptr
- protected TRI = nullptr
- protected Rem
Method Overview
- public GenericScheduler(const llvm::MachineSchedContext * C)
- protected void checkAcyclicLatency()
- public void dumpPolicy() const
- protected void initCandidate(llvm::GenericSchedulerBase::SchedCandidate & Cand, llvm::SUnit * SU, bool AtTop, const llvm::RegPressureTracker & RPTracker, llvm::RegPressureTracker & TempTracker)
- public void initPolicy(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned int NumRegionInstrs)
- public void initialize(llvm::ScheduleDAGMI * dag)
- public llvm::SUnit * pickNode(bool & IsTopNode)
- protected llvm::SUnit * pickNodeBidirectional(bool & IsTopNode)
- protected void pickNodeFromQueue(llvm::SchedBoundary & Zone, const llvm::GenericSchedulerBase::CandPolicy & ZonePolicy, const llvm::RegPressureTracker & RPTracker, llvm::GenericSchedulerBase::SchedCandidate & Candidate)
- public void registerRoots()
- public void releaseBottomNode(llvm::SUnit * SU)
- public void releaseTopNode(llvm::SUnit * SU)
- protected void reschedulePhysReg(llvm::SUnit * SU, bool isTop)
- public void schedNode(llvm::SUnit * SU, bool IsTopNode)
- public bool shouldTrackLaneMasks() const
- public bool shouldTrackPressure() const
- protected virtual void tryCandidate(llvm::GenericSchedulerBase::SchedCandidate & Cand, llvm::GenericSchedulerBase::SchedCandidate & TryCand, llvm::SchedBoundary * Zone) const
Inherited from GenericSchedulerBase:
Inherited from MachineSchedStrategy:
- public doMBBSchedRegionsTopDown
- public dumpPolicy
- public enterMBB
- public initPolicy
- public initialize
- public leaveMBB
- public pickNode
- public registerRoots
- public releaseBottomNode
- public releaseTopNode
- public schedNode
- public scheduleTree
- public shouldTrackLaneMasks
- public shouldTrackPressure
Methods
¶GenericScheduler(
const llvm::MachineSchedContext* C)
GenericScheduler(
const llvm::MachineSchedContext* C)
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:939
Parameters
- const llvm::MachineSchedContext* C
¶void checkAcyclicLatency()
void checkAcyclicLatency()
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:995
¶void dumpPolicy() const
void dumpPolicy() const
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:947
¶void initCandidate(
llvm::GenericSchedulerBase::SchedCandidate&
Cand,
llvm::SUnit* SU,
bool AtTop,
const llvm::RegPressureTracker& RPTracker,
llvm::RegPressureTracker& TempTracker)
void initCandidate(
llvm::GenericSchedulerBase::SchedCandidate&
Cand,
llvm::SUnit* SU,
bool AtTop,
const llvm::RegPressureTracker& RPTracker,
llvm::RegPressureTracker& TempTracker)
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:997
Parameters
- llvm::GenericSchedulerBase::SchedCandidate& Cand
- llvm::SUnit* SU
- bool AtTop
- const llvm::RegPressureTracker& RPTracker
- llvm::RegPressureTracker& TempTracker
¶void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned int NumRegionInstrs)
void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned int NumRegionInstrs)
Description
Optionally override the per-region scheduling policy.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:943
Parameters
- MachineBasicBlock::iterator Begin
- MachineBasicBlock::iterator End
- unsigned int NumRegionInstrs
¶void initialize(llvm::ScheduleDAGMI* dag)
void initialize(llvm::ScheduleDAGMI* dag)
Description
Initialize the strategy after building the DAG for a new region.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:957
Parameters
- llvm::ScheduleDAGMI* dag
¶llvm::SUnit* pickNode(bool& IsTopNode)
llvm::SUnit* pickNode(bool& IsTopNode)
Description
Pick the next node to schedule, or return NULL. Set IsTopNode to true to schedule the node at the top of the unscheduled region. Otherwise it will be scheduled at the bottom.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:959
Parameters
- bool& IsTopNode
¶llvm::SUnit* pickNodeBidirectional(
bool& IsTopNode)
llvm::SUnit* pickNodeBidirectional(
bool& IsTopNode)
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:1004
Parameters
- bool& IsTopNode
¶void pickNodeFromQueue(
llvm::SchedBoundary& Zone,
const llvm::GenericSchedulerBase::CandPolicy&
ZonePolicy,
const llvm::RegPressureTracker& RPTracker,
llvm::GenericSchedulerBase::SchedCandidate&
Candidate)
void pickNodeFromQueue(
llvm::SchedBoundary& Zone,
const llvm::GenericSchedulerBase::CandPolicy&
ZonePolicy,
const llvm::RegPressureTracker& RPTracker,
llvm::GenericSchedulerBase::SchedCandidate&
Candidate)
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:1006
Parameters
- llvm::SchedBoundary& Zone
- const llvm::GenericSchedulerBase::CandPolicy& ZonePolicy
- const llvm::RegPressureTracker& RPTracker
- llvm::GenericSchedulerBase::SchedCandidate& Candidate
¶void registerRoots()
void registerRoots()
Description
Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:979
¶void releaseBottomNode(llvm::SUnit* SU)
void releaseBottomNode(llvm::SUnit* SU)
Description
When all successor dependencies have been resolved, free this node for bottom-up scheduling.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:971
Parameters
- llvm::SUnit* SU
¶void releaseTopNode(llvm::SUnit* SU)
void releaseTopNode(llvm::SUnit* SU)
Description
When all predecessor dependencies have been resolved, free this node for top-down scheduling.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:963
Parameters
- llvm::SUnit* SU
¶void reschedulePhysReg(llvm::SUnit* SU,
bool isTop)
void reschedulePhysReg(llvm::SUnit* SU,
bool isTop)
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:1011
Parameters
- llvm::SUnit* SU
- bool isTop
¶void schedNode(llvm::SUnit* SU, bool IsTopNode)
void schedNode(llvm::SUnit* SU, bool IsTopNode)
Description
Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an instruction and updated scheduled/remaining flags in the DAG nodes.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:961
Parameters
- llvm::SUnit* SU
- bool IsTopNode
¶bool shouldTrackLaneMasks() const
bool shouldTrackLaneMasks() const
Description
Returns true if lanemasks should be tracked. LaneMask tracking is necessary to reorder independent subregister defs for the same vreg. This has to be enabled in combination with shouldTrackPressure().
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:953
¶bool shouldTrackPressure() const
bool shouldTrackPressure() const
Description
Check if pressure tracking is needed before building the DAG and initializing this strategy. Called after initPolicy.
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:949
¶virtual void tryCandidate(
llvm::GenericSchedulerBase::SchedCandidate&
Cand,
llvm::GenericSchedulerBase::SchedCandidate&
TryCand,
llvm::SchedBoundary* Zone) const
virtual void tryCandidate(
llvm::GenericSchedulerBase::SchedCandidate&
Cand,
llvm::GenericSchedulerBase::SchedCandidate&
TryCand,
llvm::SchedBoundary* Zone) const
Declared at: llvm/include/llvm/CodeGen/MachineScheduler.h:1001