enum NodeType

Description

ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG. Targets may also define target-dependent operator codes for SDNodes. For example, on x86, these are the enum values in the X86ISD namespace. Targets should aim to use target-independent operators to model their instruction sets as much as possible, and only use target-dependent operators when they have special requirements. Finally, during and after selection proper, SNodes may use special operator codes that correspond directly with MachineInstr opcodes. These are used to represent selected instructions. See the isMachineOpcode() and getMachineOpcode() member functions of SDNode.

Declared at: llvm/include/llvm/CodeGen/ISDOpcodes.h:40

Enumerators

Name	Value	Comment
DELETED_NODE	0	DELETED_NODE - This is an illegal value that is used to catch errors. This opcode is not a legal opcode for any node.
EntryToken	1	EntryToken - This is the marker used to indicate the start of a region.
TokenFactor	2	TokenFactor - This node takes multiple tokens as input and produces a single token result. This is used to represent the fact that the operand operators are independent of each other.
AssertSext	3	AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero or sign extended from a narrower type. These nodes take two operands. The first is the node that has already been extended, and the second is a value type node indicating the width of the extension
AssertZext	4	AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero or sign extended from a narrower type. These nodes take two operands. The first is the node that has already been extended, and the second is a value type node indicating the width of the extension
BasicBlock	5	Various leaf nodes.
VALUETYPE	6	Various leaf nodes.
CONDCODE	7	Various leaf nodes.
Register	8	Various leaf nodes.
RegisterMask	9	Various leaf nodes.
Constant	10	Various leaf nodes.
ConstantFP	11	Various leaf nodes.
GlobalAddress	12	Various leaf nodes.
GlobalTLSAddress	13	Various leaf nodes.
FrameIndex	14	Various leaf nodes.
JumpTable	15	Various leaf nodes.
ConstantPool	16	Various leaf nodes.
ExternalSymbol	17	Various leaf nodes.
BlockAddress	18	Various leaf nodes.
GLOBAL_OFFSET_TABLE	19	The address of the GOT
FRAMEADDR	20	FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG. These nodes take one operand, the index of the frame or return address to return. An index of zero corresponds to the current function's frame or return address, an index of one to the parent's frame or return address, and so on.
RETURNADDR	21	FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG. These nodes take one operand, the index of the frame or return address to return. An index of zero corresponds to the current function's frame or return address, an index of one to the parent's frame or return address, and so on.
ADDROFRETURNADDR	22	FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG. These nodes take one operand, the index of the frame or return address to return. An index of zero corresponds to the current function's frame or return address, an index of one to the parent's frame or return address, and so on.
SPONENTRY	23	FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG. These nodes take one operand, the index of the frame or return address to return. An index of zero corresponds to the current function's frame or return address, an index of one to the parent's frame or return address, and so on.
LOCAL_RECOVER	24	LOCAL_RECOVER - Represents the llvm.localrecover intrinsic. Materializes the offset from the local object pointer of another function to a particular local object passed to llvm.localescape. The operand is the MCSymbol label used to represent this offset, since typically the offset is not known until after code generation of the parent.
READ_REGISTER	25	READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the named register global variables extension.
WRITE_REGISTER	26	READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the named register global variables extension.
FRAME_TO_ARGS_OFFSET	27	FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack argument. This is needed for correct stack adjustment during unwind.
EH_DWARF_CFA	28	EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA), generally the value of the stack pointer at the call site in the previous frame.
EH_RETURN	29	OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin, which is used to return from exception. The general meaning is: adjust stack by OFFSET and pass execution to HANDLER. Many platform-related details also :)
EH_SJLJ_SETJMP	30	RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.setjmp intrinsic. It takes an input chain and a pointer to the jump buffer as inputs and returns an outchain.
EH_SJLJ_LONGJMP	31	OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic. It takes an input chain and a pointer to the jump buffer as inputs and returns an outchain.
EH_SJLJ_SETUP_DISPATCH	32	OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
TargetConstant	33	TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant. They are used for constants which are known to fit in the immediate fields of their users, or for carrying magic numbers which are not values which need to be materialized in registers.
TargetConstantFP	34	TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant. They are used for constants which are known to fit in the immediate fields of their users, or for carrying magic numbers which are not values which need to be materialized in registers.
TargetGlobalAddress	35	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetGlobalTLSAddress	36	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetFrameIndex	37	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetJumpTable	38	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetConstantPool	39	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetExternalSymbol	40	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetBlockAddress	41	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
MCSymbol	42	TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node, and this is valid in the target-specific dag, turning into a GlobalAddress operand.
TargetIndex	43	TargetIndex - Like a constant pool entry, but with completely target-dependent semantics. Holds target flags, a 32-bit index, and a 64-bit index. Targets can use this however they like.
INTRINSIC_WO_CHAIN	44	RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with no side effects. The first operand is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node returns the result of the intrinsic.
INTRINSIC_W_CHAIN	45	RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target intrinsic function with side effects that returns a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node has two results, the result of the intrinsic and an output chain.
INTRINSIC_VOID	46	OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with side effects that does not return a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow.
CopyToReg	47	CopyToReg - This node has three operands: a chain, a register number to set to this value, and a value.
CopyFromReg	48	CopyFromReg - This node indicates that the input value is a virtual or physical register that is defined outside of the scope of this SelectionDAG. The register is available from the RegisterSDNode object.
UNDEF	49	UNDEF - An undefined node.
EXTRACT_ELEMENT	50	EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0. This is only for use before legalization, for values that will be broken into multiple registers.
BUILD_PAIR	51	BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways. Given two values of the same integer value type, this produces a value twice as big. Like EXTRACT_ELEMENT, this can only be used before legalization. The lower part of the composite value should be in element 0 and the upper part should be in element 1.
MERGE_VALUES	52	MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual results. This nodes has exactly the same number of inputs and outputs. This node is useful for some pieces of the code generator that want to think about a single node with multiple results, not multiple nodes.
ADD	53	Simple integer binary arithmetic operators.
SUB	54	Simple integer binary arithmetic operators.
MUL	55	Simple integer binary arithmetic operators.
SDIV	56	Simple integer binary arithmetic operators.
UDIV	57	Simple integer binary arithmetic operators.
SREM	58	Simple integer binary arithmetic operators.
UREM	59	Simple integer binary arithmetic operators.
SMUL_LOHI	60	SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2*N], and return the full value as two results, each of type iN.
UMUL_LOHI	61	SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2*N], and return the full value as two results, each of type iN.
SDIVREM	62	SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
UDIVREM	63	SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
CARRY_FALSE	64	CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry result is always false.
ADDC	65	Carry-setting nodes for multiple precision addition and subtraction. These nodes take two operands of the same value type, and produce two results. The first result is the normal add or sub result, the second result is the carry flag result. FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY. They are kept around for now to provide a smooth transition path toward the use of ADDCARRY/SUBCARRY and will eventually be removed.
SUBC	66	Carry-setting nodes for multiple precision addition and subtraction. These nodes take two operands of the same value type, and produce two results. The first result is the normal add or sub result, the second result is the carry flag result. FIXME: These nodes are deprecated in favor of ADDCARRY and SUBCARRY. They are kept around for now to provide a smooth transition path toward the use of ADDCARRY/SUBCARRY and will eventually be removed.
ADDE	67	Carry-using nodes for multiple precision addition and subtraction. These nodes take three operands: The first two are the normal lhs and rhs to the add or sub, and the third is the input carry flag. These nodes produce two results; the normal result of the add or sub, and the output carry flag. These nodes both read and write a carry flag to allow them to them to be chained together for add and sub of arbitrarily large values.
SUBE	68	Carry-using nodes for multiple precision addition and subtraction. These nodes take three operands: The first two are the normal lhs and rhs to the add or sub, and the third is the input carry flag. These nodes produce two results; the normal result of the add or sub, and the output carry flag. These nodes both read and write a carry flag to allow them to them to be chained together for add and sub of arbitrarily large values.
ADDCARRY	69	Carry-using nodes for multiple precision addition and subtraction. These nodes take three operands: The first two are the normal lhs and rhs to the add or sub, and the third is a boolean indicating if there is an incoming carry. These nodes produce two results: the normal result of the add or sub, and the output carry so they can be chained together. The use of this opcode is preferable to adde/sube if the target supports it, as the carry is a regular value rather than a glue, which allows further optimisation.
SUBCARRY	70	Carry-using nodes for multiple precision addition and subtraction. These nodes take three operands: The first two are the normal lhs and rhs to the add or sub, and the third is a boolean indicating if there is an incoming carry. These nodes produce two results: the normal result of the add or sub, and the output carry so they can be chained together. The use of this opcode is preferable to adde/sube if the target supports it, as the carry is a regular value rather than a glue, which allows further optimisation.
SADDO	71	RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. These nodes take two operands: the normal LHS and RHS to the add. They produce two results: the normal result of the add, and a boolean that indicates if an overflow occurred (not a flag, because it may be store to memory, etc.). If the type of the boolean is not i1 then the high bits conform to getBooleanContents. These nodes are generated from llvm.[su]add.with.overflow intrinsics.
UADDO	72	RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition. These nodes take two operands: the normal LHS and RHS to the add. They produce two results: the normal result of the add, and a boolean that indicates if an overflow occurred (not a flag, because it may be store to memory, etc.). If the type of the boolean is not i1 then the high bits conform to getBooleanContents. These nodes are generated from llvm.[su]add.with.overflow intrinsics.
SSUBO	73	Same for subtraction.
USUBO	74	Same for subtraction.
SMULO	75	Same for multiplication.
UMULO	76	Same for multiplication.
SADDSAT	77	RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W). If the true value of LHS + RHS exceeds the largest value that can be represented by W bits, the resulting value is this maximum value. Otherwise, if this value is less than the smallest value that can be represented by W bits, the resulting value is this minimum value.
UADDSAT	78	RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W). If the true value of LHS + RHS exceeds the largest value that can be represented by W bits, the resulting value is this maximum value. Otherwise, if this value is less than the smallest value that can be represented by W bits, the resulting value is this minimum value.
SSUBSAT	79	RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width (W). If the true value of LHS - RHS exceeds the largest value that can be represented by W bits, the resulting value is this maximum value. Otherwise, if this value is less than the smallest value that can be represented by W bits, the resulting value is this minimum value.
USUBSAT	80	RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width (W). If the true value of LHS - RHS exceeds the largest value that can be represented by W bits, the resulting value is this maximum value. Otherwise, if this value is less than the smallest value that can be represented by W bits, the resulting value is this minimum value.
SMULFIX	81	RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same width and scale. SCALE represents the scale of both operands as fixed point numbers. This SCALE parameter must be a constant integer. A scale of zero is effectively performing multiplication on 2 integers.
UMULFIX	82	RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same width and scale. SCALE represents the scale of both operands as fixed point numbers. This SCALE parameter must be a constant integer. A scale of zero is effectively performing multiplication on 2 integers.
SMULFIXSAT	83	Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the min and max values representable by the bits of the first 2 operands.
UMULFIXSAT	84	Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the min and max values representable by the bits of the first 2 operands.
SDIVFIX	85	RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width and scale. SCALE represents the scale of both operands as fixed point numbers. This SCALE parameter must be a constant integer.
UDIVFIX	86	RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width and scale. SCALE represents the scale of both operands as fixed point numbers. This SCALE parameter must be a constant integer.
FADD	87	Simple binary floating point operators.
FSUB	88	Simple binary floating point operators.
FMUL	89	Simple binary floating point operators.
FDIV	90	Simple binary floating point operators.
FREM	91	Simple binary floating point operators.
STRICT_FADD	92	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FSUB	93	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMUL	94	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FDIV	95	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FREM	96	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMA	97	Constrained versions of the binary floating point operators. These will be lowered to the simple operators before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FSQRT	98	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FPOW	99	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FPOWI	100	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FSIN	101	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FCOS	102	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FEXP	103	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FEXP2	104	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FLOG	105	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FLOG10	106	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FLOG2	107	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FRINT	108	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FNEARBYINT	109	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMAXNUM	110	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMINNUM	111	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FCEIL	112	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FFLOOR	113	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FROUND	114	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FTRUNC	115	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_LROUND	116	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_LLROUND	117	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_LRINT	118	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_LLRINT	119	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMAXIMUM	120	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FMINIMUM	121	Constrained versions of libm-equivalent floating point intrinsics. These will be lowered to the equivalent non-constrained pseudo-op (or expanded to the equivalent library call) before final selection. They are used to limit optimizations while the DAG is being optimized.
STRICT_FP_TO_SINT	122	STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer. These have the same semantics as fptosi and fptoui in IR. They are used to limit optimizations while the DAG is being optimized.
STRICT_FP_TO_UINT	123	STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer. These have the same semantics as fptosi and fptoui in IR. They are used to limit optimizations while the DAG is being optimized.
STRICT_SINT_TO_FP	124	STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value. These have the same semantics as sitofp and uitofp in IR. They are used to limit optimizations while the DAG is being optimized.
STRICT_UINT_TO_FP	125	STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value. These have the same semantics as sitofp and uitofp in IR. They are used to limit optimizations while the DAG is being optimized.
STRICT_FP_ROUND	126	X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the destination VT. TRUNC is a flag, which is always an integer that is zero or one. If TRUNC is 0, this is a normal rounding, if it is 1, this FP_ROUND is known to not change the value of Y.The TRUNC = 1 case is used in cases where we know that the value will not be modified by the node, because Y is not using any of the extra precision of source type. This allows certain transformations like STRICT_FP_EXTEND(STRICT_FP_ROUND(X,1)) -> X which are not safe for STRICT_FP_EXTEND(STRICT_FP_ROUND(X,0)) because the extra bits aren't removed. It is used to limit optimizations while the DAG is being optimized.
STRICT_FP_EXTEND	127	X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. It is used to limit optimizations while the DAG is being optimized.
STRICT_FSETCC	128	STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only. STRICT_FSETCC performs a quiet comparison operation, while STRICT_FSETCCS performs a signaling comparison operation.
STRICT_FSETCCS	129	STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only. STRICT_FSETCC performs a quiet comparison operation, while STRICT_FSETCCS performs a signaling comparison operation.
FMA	130	FMA - Perform a * b + c with no intermediate rounding step.
FMAD	131	FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
FCOPYSIGN	132	FCOPYSIGN(X, Y) - Return the value of X with the sign of Y. NOTE: This DAG node does not require that X and Y have the same type, just that they are both floating point. X and the result must have the same type. FCOPYSIGN(f32, f64) is allowed.
FGETSIGN	133	INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 value.
FCANONICALIZE	134	Returns platform specific canonical encoding of a floating point number.
BUILD_VECTOR	135	BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable, elements. The number of elements is required to be a power of two. The types of the operands must all be the same and must match the vector element type, except that integer types are allowed to be larger than the element type, in which case the operands are implicitly truncated.
INSERT_VECTOR_ELT	136	INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL. If the type of VAL is larger than the vector element type then VAL is truncated before replacement.
EXTRACT_VECTOR_ELT	137	EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially variable) element number IDX. If the return type is an integer type larger than the element type of the vector, the result is extended to the width of the return type. In that case, the high bits are undefined.
CONCAT_VECTORS	138	CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length and element type, this produces a concatenated vector result value, with length equal to the sum of the lengths of the input vectors.
INSERT_SUBVECTOR	139	INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1 at the (potentially variable) element number IDX, which must be a multiple of the VECTOR2 vector length. The elements of VECTOR1 starting at IDX are overwritten with VECTOR2. Elements IDX through vector_length(VECTOR2) must be valid VECTOR1 indices.
EXTRACT_SUBVECTOR	140	EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the element number IDX, which must be a constant multiple of the result vector length.
VECTOR_SHUFFLE	141	VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2. A VECTOR_SHUFFLE node also contains an array of constant int values that indicate which value (or undef) each result element will get. These constant ints are accessible through the ShuffleVectorSDNode class. This is quite similar to the Altivec 'vperm' instruction, except that the indices must be constants and are in terms of the element size of VEC1/VEC2, not in terms of bytes.
SCALAR_TO_VECTOR	142	SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the resultant vector type. The top elements 1 to N-1 of the N-element vector are undefined. The type of the operand must match the vector element type, except when they are integer types. In this case the operand is allowed to be wider than the vector element type, and is implicitly truncated to it.
SPLAT_VECTOR	143	SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes. The type of the operand must match the vector element type, except when they are integer types. In this case the operand is allowed to be wider than the vector element type, and is implicitly truncated to it.
MULHU	144	MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of type i[2*N], then return the top part.
MULHS	145	MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of type i[2*N], then return the top part.
SMIN	146	[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
SMAX	147	[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
UMIN	148	[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
UMAX	149	[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
AND	150	Bitwise operators - logical and, logical or, logical xor.
OR	151	Bitwise operators - logical and, logical or, logical xor.
XOR	152	Bitwise operators - logical and, logical or, logical xor.
ABS	153	ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth. Note: A value of INT_MIN will return INT_MIN, no saturation or overflow is performed.
SHL	154	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
SRA	155	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
SRL	156	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
ROTL	157	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
ROTR	158	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
FSHL	159	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
FSHR	160	Shift and rotation operations. After legalization, the type of the shift amount is known to be TLI.getShiftAmountTy(). Before legalization the shift amount can be any type, but care must be taken to ensure it is large enough. TLI.getShiftAmountTy() is i8 on some targets, but before legalization, types like i1024 can occur and i8 doesn't have enough bits to represent the shift amount. When the 1st operand is a vector, the shift amount must be in the same type. (TLI.getShiftAmountTy() will return the same type when the input type is a vector.) For rotates and funnel shifts, the shift amount is treated as an unsigned amount modulo the element size of the first operand.Funnel 'double' shifts take 3 operands, 2 inputs and the shift amount. fshl(X,Y,Z): (X < < (Z % BW)) \| (Y >> (BW - (Z % BW))) fshr(X,Y,Z): (X < < (BW - (Z % BW))) \| (Y >> (Z % BW))
BSWAP	161	Byte Swap and Counting operators.
CTTZ	162	Byte Swap and Counting operators.
CTLZ	163	Byte Swap and Counting operators.
CTPOP	164	Byte Swap and Counting operators.
BITREVERSE	165	Byte Swap and Counting operators.
CTTZ_ZERO_UNDEF	166	Bit counting operators with an undefined result for zero inputs.
CTLZ_ZERO_UNDEF	167	Bit counting operators with an undefined result for zero inputs.
SELECT	168	Select(COND, TRUEVAL, FALSEVAL). If the type of the boolean COND is not i1 then the high bits must conform to getBooleanContents.
VSELECT	169	Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector result. All vectors have the same length. Much like the scalar select and setcc, each bit in the condition selects whether the corresponding result element is taken from op #1 or op #2. At first, the VSELECT condition is of vXi1 type. Later, targets may change the condition type in order to match the VSELECT node using a pattern. The condition follows the BooleanContent format of the target.
SELECT_CC	170	Select with condition operator - This selects between a true value and a false value (ops #2 and #3) based on the boolean result of comparing the lhs and rhs (ops #0 and #1) of a conditional expression with the condition code in op #4, a CondCodeSDNode.
SETCC	171	SetCC operator - This evaluates to a true value iff the condition is true. If the result value type is not i1 then the high bits conform to getBooleanContents. The operands to this are the left and right operands to compare (ops #0, and #1) and the condition code to compare them with (op #2) as a CondCodeSDNode. If the operands are vector types then the result type must also be a vector type.
SETCCCARRY	172	Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating if there is an incoming carry. This operator checks the result of "LHS - RHS - Carry", and can be used to compare two wide integers: (setcccarry lhshi rhshi (subcarry lhslo rhslo) cc). Only valid for integers.
SHL_PARTS	173	SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations. The operation ordering is: [Lo,Hi] = op [LoLHS,HiLHS], Amt
SRA_PARTS	174	SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations. The operation ordering is: [Lo,Hi] = op [LoLHS,HiLHS], Amt
SRL_PARTS	175	SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations. The operation ordering is: [Lo,Hi] = op [LoLHS,HiLHS], Amt
SIGN_EXTEND	176	SIGN_EXTEND - Used for integer types, replicating the sign bit into new bits.
ZERO_EXTEND	177	ZERO_EXTEND - Used for integer types, zeroing the new bits.
ANY_EXTEND	178	ANY_EXTEND - Used for integer types. The high bits are undefined.
TRUNCATE	179	TRUNCATE - Completely drop the high bits.
SINT_TO_FP	180	[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter) to floating point.
UINT_TO_FP	181	[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter) to floating point.
SIGN_EXTEND_INREG	182	SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in a large integer register (e.g. sign extending the low 8 bits of a 32-bit register to fill the top 24 bits with the 7th bit). The size of the smaller type is indicated by the 1th operand, a ValueType node.
ANY_EXTEND_VECTOR_INREG	183	ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low lanes of an integer vector. The result type must have fewer elements than the operand type, and those elements must be larger integer types such that the total size of the operand type is less than or equal to the size of the result type. Each of the low operand elements is any-extended into the corresponding, wider result elements with the high bits becoming undef. NOTE: The type legalizer prefers to make the operand and result size the same to allow expansion to shuffle vector during op legalization.
SIGN_EXTEND_VECTOR_INREG	184	SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low lanes of an integer vector. The result type must have fewer elements than the operand type, and those elements must be larger integer types such that the total size of the operand type is less than or equal to the size of the result type. Each of the low operand elements is sign-extended into the corresponding, wider result elements. NOTE: The type legalizer prefers to make the operand and result size the same to allow expansion to shuffle vector during op legalization.
ZERO_EXTEND_VECTOR_INREG	185	ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low lanes of an integer vector. The result type must have fewer elements than the operand type, and those elements must be larger integer types such that the total size of the operand type is less than or equal to the size of the result type. Each of the low operand elements is zero-extended into the corresponding, wider result elements. NOTE: The type legalizer prefers to make the operand and result size the same to allow expansion to shuffle vector during op legalization.
FP_TO_SINT	186	FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer. These have the same semantics as fptosi and fptoui in IR. If the FP value cannot fit in the integer type, the results are undefined.
FP_TO_UINT	187	FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer. These have the same semantics as fptosi and fptoui in IR. If the FP value cannot fit in the integer type, the results are undefined.
FP_ROUND	188	X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the destination VT. TRUNC is a flag, which is always an integer that is zero or one. If TRUNC is 0, this is a normal rounding, if it is 1, this FP_ROUND is known to not change the value of Y.The TRUNC = 1 case is used in cases where we know that the value will not be modified by the node, because Y is not using any of the extra precision of source type. This allows certain transformations like FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed.
FLT_ROUNDS_	189	FLT_ROUNDS_ - Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest 2 Round to +inf 3 Round to -inf
FP_EXTEND	190	X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
BITCAST	191	BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to memory with one type and loaded from the same address with the other type (or equivalently for vector format conversions, etc). The source and result are required to have the same bit size (e.g. f32 < -> i32). This can also be used for int-to-int or fp-to-fp conversions, but that is a noop, deleted by getNode().This operator is subtly different from the bitcast instruction from LLVM-IR since this node may change the bits in the register. For example, this occurs on big-endian NEON and big-endian MSA where the layout of the bits in the register depends on the vector type and this operator acts as a shuffle operation for some vector type combinations.
ADDRSPACECAST	192	ADDRSPACECAST - This operator converts between pointers of different address spaces.
FP16_TO_FP	193	FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-precision (16 bit) floating numbers. These nodes form a semi-softened interface for dealing with f16 (as an i16), which is often a storage-only type but has native conversions.
FP_TO_FP16	194	FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-precision (16 bit) floating numbers. These nodes form a semi-softened interface for dealing with f16 (as an i16), which is often a storage-only type but has native conversions.
FNEG	195	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FABS	196	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FSQRT	197	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FCBRT	198	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FSIN	199	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FCOS	200	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FPOWI	201	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FPOW	202	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FLOG	203	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FLOG2	204	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FLOG10	205	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FEXP	206	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FEXP2	207	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FCEIL	208	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FTRUNC	209	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FRINT	210	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FNEARBYINT	211	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FROUND	212	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FFLOOR	213	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
LROUND	214	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
LLROUND	215	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
LRINT	216	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
LLRINT	217	Perform various unary floating-point operations inspired by libm. For FPOWI, the result is undefined if if the integer operand doesn't fit into 32 bits.
FMINNUM	218	In the case where a single input is a NaN (either signaling or quiet), the non-NaN input is returned.The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
FMAXNUM	219	In the case where a single input is a NaN (either signaling or quiet), the non-NaN input is returned.The return value of (FMINNUM 0.0, -0.0) could be either 0.0 or -0.0.
FMINNUM_IEEE	220	FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on two values, following the IEEE-754 2008 definition. This differs from FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a signaling NaN, returns a quiet NaN.
FMAXNUM_IEEE	221	FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on two values, following the IEEE-754 2008 definition. This differs from FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a signaling NaN, returns a quiet NaN.
FMINIMUM	222	FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
FMAXIMUM	223	FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008 semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
FSINCOS	224	FSINCOS - Compute both fsin and fcos as a single operation.
LOAD	225	LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store instruction, then an offset node that is added / subtracted from the base pointer to form the address (for indexed memory ops).
STORE	226	LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store instruction, then an offset node that is added / subtracted from the base pointer to form the address (for indexed memory ops).
DYNAMIC_STACKALLOC	227	DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary. This node always has two return values: a new stack pointer value and a chain. The first operand is the token chain, the second is the number of bytes to allocate, and the third is the alignment boundary. The size is guaranteed to be a multiple of the stack alignment, and the alignment is guaranteed to be bigger than the stack alignment (if required) or 0 to get standard stack alignment.
BR	228	BR - Unconditional branch. The first operand is the chain operand, the second is the MBB to branch to.
BRIND	229	BRIND - Indirect branch. The first operand is the chain, the second is the value to branch to, which must be of the same type as the target's pointer type.
BR_JT	230	BR_JT - Jumptable branch. The first operand is the chain, the second is the jumptable index, the last one is the jumptable entry index.
BRCOND	231	BRCOND - Conditional branch. The first operand is the chain, the second is the condition, the third is the block to branch to if the condition is true. If the type of the condition is not i1, then the high bits must conform to getBooleanContents.
BR_CC	232	BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in that the condition is represented as condition code, and two nodes to compare, rather than as a combined SetCC node. The operands in order are chain, cc, lhs, rhs, block to branch to if condition is true.
INLINEASM	233	INLINEASM - Represents an inline asm block. This node always has two return values: a chain and a flag result. The inputs are as follows: Operand #0 : Input chain. Operand #1 : a ExternalSymbolSDNode with a pointer to the asm string. Operand #2 : a MDNodeSDNode with the !srcloc metadata. Operand #3 : HasSideEffect, IsAlignStack bits. After this, it is followed by a list of operands with this format: ConstantSDNode: Flags that encode whether it is a mem or not, the of operands that follow, etc. See InlineAsm.h. ... however many operands ... Operand #last: Optional, an incoming flag.The variable width operands are required to represent target addressing modes as a single "operand", even though they may have multiple SDOperands.
INLINEASM_BR	234	INLINEASM_BR - Terminator version of inline asm. Used by asm-goto.
EH_LABEL	235	EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and exception handling tables. These nodes take a chain as input and return a chain.
ANNOTATION_LABEL	236	ANNOTATION_LABEL - Represents a mid basic block label used by annotations. This should remain within the basic block and be ordered with respect to other call instructions, but loads and stores may float past it.
CATCHPAD	237	CATCHPAD - Represents a catchpad instruction.
CATCHRET	238	CATCHRET - Represents a return from a catch block funclet. Used for MSVC compatible exception handling. Takes a chain operand and a destination basic block operand.
CLEANUPRET	239	CLEANUPRET - Represents a return from a cleanup block funclet. Used for MSVC compatible exception handling. Takes only a chain operand.
STACKSAVE	240	STACKSAVE - STACKSAVE has one operand, an input chain. It produces a value, the same type as the pointer type for the system, and an output chain.
STACKRESTORE	241	STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
CALLSEQ_START	242	CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence, and carry arbitrary information that target might want to know. The first operand is a chain, the rest are specified by the target and not touched by the DAG optimizers. Targets that may use stack to pass call arguments define additional operands: - size of the call frame part that must be set up within the CALLSEQ_START..CALLSEQ_END pair, - part of the call frame prepared prior to CALLSEQ_START. Both these parameters must be constants, their sum is the total call frame size. CALLSEQ_START..CALLSEQ_END pairs may not be nested.
CALLSEQ_END	243	CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence, and carry arbitrary information that target might want to know. The first operand is a chain, the rest are specified by the target and not touched by the DAG optimizers. Targets that may use stack to pass call arguments define additional operands: - size of the call frame part that must be set up within the CALLSEQ_START..CALLSEQ_END pair, - part of the call frame prepared prior to CALLSEQ_START. Both these parameters must be constants, their sum is the total call frame size. CALLSEQ_START..CALLSEQ_END pairs may not be nested.
VAARG	244	VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment. It returns a pair of values: the vaarg value and a new chain.
VACOPY	245	VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the source.
VAEND	246	VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
VASTART	247	VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
SRCVALUE	248	SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the LLVM IR.
MDNODE_SDNODE	249	MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
PCMARKER	250	PCMARKER - This corresponds to the pcmarker intrinsic.
READCYCLECOUNTER	251	READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic. It produces a chain and one i64 value. The only operand is a chain. If i64 is not legal, the result will be expanded into smaller values. Still, it returns an i64, so targets should set legality for i64. The result is the content of the architecture-specific cycle counter-like register (or other high accuracy low latency clock source).
HANDLENODE	252	HANDLENODE node - Used as a handle for various purposes.
INIT_TRAMPOLINE	253	INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic. It takes as input a token chain, the pointer to the trampoline, the pointer to the nested function, the pointer to pass for the 'nest' parameter, a SRCVALUE for the trampoline and another for the nested function (allowing targets to access the original Function*). It produces a token chain as output.
ADJUST_TRAMPOLINE	254	ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic. It takes a pointer to the trampoline and produces a (possibly) new pointer to the same trampoline with platform-specific adjustments applied. The pointer it returns points to an executable block of code.
TRAP	255	TRAP - Trapping instruction
DEBUGTRAP	256	DEBUGTRAP - Trap intended to get the attention of a debugger.
PREFETCH	257	PREFETCH - This corresponds to a prefetch intrinsic. The first operand is the chain. The other operands are the address to prefetch, read / write specifier, locality specifier and instruction / data cache specifier.
ATOMIC_FENCE	258	OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction. It takes an input chain, and two integer constants: an AtomicOrdering and a SynchronizationScope.
ATOMIC_LOAD	259	Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
ATOMIC_STORE	260	OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
ATOMIC_CMP_SWAP	261	Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmpLo, cmpHi, swapLo, swapHi) This corresponds to the cmpxchg instruction.
ATOMIC_CMP_SWAP_WITH_SUCCESS	262	Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b. this is still a strong cmpxchg operation, so Success == "Val == cmp".
ATOMIC_SWAP	263	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_ADD	264	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_SUB	265	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_AND	266	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_CLR	267	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_OR	268	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_XOR	269	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_NAND	270	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_MIN	271	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_MAX	272	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_UMIN	273	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_UMAX	274	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_FADD	275	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
ATOMIC_LOAD_FSUB	276	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
MLOAD	277	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
MSTORE	278	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
MGATHER	279	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
MSCATTER	280	Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
LIFETIME_START	281	This corresponds to the llvm.lifetime.* intrinsics. The first operand is the chain and the second operand is the alloca pointer.
LIFETIME_END	282	This corresponds to the llvm.lifetime.* intrinsics. The first operand is the chain and the second operand is the alloca pointer.
GC_TRANSITION_START	283	GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition sequence, and carry arbitrary information that target might need for lowering. The first operand is a chain, the rest are specified by the target and not touched by the DAG optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be nested.
GC_TRANSITION_END	284	GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition sequence, and carry arbitrary information that target might need for lowering. The first operand is a chain, the rest are specified by the target and not touched by the DAG optimizers. GC_TRANSITION_START..GC_TRANSITION_END pairs may not be nested.
GET_DYNAMIC_AREA_OFFSET	285	GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca. For most targets that would be 0, but for some others (e.g. PowerPC, PowerPC64) that would be compile-time known nonzero constant. The only operand here is the chain.
VECREDUCE_STRICT_FADD	286	Generic reduction nodes. These nodes represent horizontal vector reduction operations, producing a scalar result. The STRICT variants perform reductions in sequential order. The first operand is an initial scalar accumulator value, and the second operand is the vector to reduce.
VECREDUCE_STRICT_FMUL	287	Generic reduction nodes. These nodes represent horizontal vector reduction operations, producing a scalar result. The STRICT variants perform reductions in sequential order. The first operand is an initial scalar accumulator value, and the second operand is the vector to reduce.
VECREDUCE_FADD	288	These reductions are non-strict, and have a single vector operand.
VECREDUCE_FMUL	289	These reductions are non-strict, and have a single vector operand.
VECREDUCE_FMAX	290	FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
VECREDUCE_FMIN	291	FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
VECREDUCE_ADD	292	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_MUL	293	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_AND	294	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_OR	295	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_XOR	296	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_SMAX	297	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_SMIN	298	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_UMAX	299	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
VECREDUCE_UMIN	300	Integer reductions may have a result type larger than the vector element type. However, the reduction is performed using the vector element type and the value in the top bits is unspecified.
BUILTIN_OP_END	301	BUILTIN_OP_END - This must be the last enum value in this list. The target-specific pre-isel opcode values start here.